aculab MC3 Manuel d'installation - Page 8
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MC3 PCI Card
Guide
4.4
MC3 PCI Card Architecture
Block diagram of the Aculab MC3 PCI card
Numbers attached to arrows indicate the number of timeslots available in the direction of the
arrow.
4.5
MC3 PCI card Reset
The MC3 PCI card enters a hardware reset state during power up and power down of the host
PC (i.e. any time the RESET line on the PCI bus is asserted) and any time the +5V power supply
from the host PC drops below a voltage at which proper operation can be maintained. The
supply voltage threshold is configured as 4.65V (-7% of nominal).
4.6
The Digital Switch Array
It is the size of the Digital Switch Array which limits connectivity in this architecture.
For an application which connects the maximum number of bi-directional channels between
H.100 and MC3 there will be 1024 timeslots in each direction between H.100 and the Digital
Switch Array. It is possible to connect all of this traffic to a single physical ring because of the
capacity of the DHS Pairs. Typically though, in an MC3 ring network, traffic will be distributed
across both physical rings.
The hardware architecture of MC3 PCI will also support non-MC3 applications where, for
example, all 2048 timeslots at the Digital Switch Array are used to make transmit-only (or
receive-only) connections between H.100 and one or both fibre rings.
8
OC3
Transceiver &
Framer
Fibre Ring 2 (2423)
1024
DHS
Digital
Hyperchannel
Pair
Switch
Digital Switch
1024
Array
(2048)
1024
H.100 (4096)
Fibre Ring 1 (2423)
OC3
Transceiver &
Framer
1024
DHS
Pair
1024
BERT