Aries Embedded RISC-V on MAX10 Manuel de l'utilisateur - Page 8
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3.1 MAX10 SoMs
To run the RISC-V demos on a MAX10 board one of the following SoMs is required:
• SpiderSoM-S (10M08SAU169C8G)
• MX10-S8 (10M08DAF256C8G)
• MX10-U (10M50DAF256I7G)
To compile the firmware the RISC-V GCC toolchain is required.
To build the hardware design
To programm the image on the board either a JTAG USB-Blaster (with Quartus Programmer) or OpenOCD
is required.
As reference for this guide Linux Ubuntu 20.04 is used, other Linux distributions may work similarly. While
the toolchain can be used on Windows only limited support is available.
3.2 Reference Designs
The first step is to to download the reference designs using git. Open a terminal window to clone the
repository with the command:
git clone https://github.com/ARIES-Embedded/riscv-on-max10
Chapter 3. Requirements
Intel Quartus Prime
is required.
CHAPTER
THREE
REQUIREMENTS
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