Motorola LB3 (42.0 - 50.0MHz) Informazioni sul servizio - Pagina 12
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antenna of the radio. The variation in the driver's output power is limited by controlling its DC
current. The driver's DC current is monitored by measuring the voltage drop across current-sense
resistors R1473-6, and this voltage is compared to a reference voltage on pin 6 of U1402-2. If the
current through the sense resistors decreases, the circuit increases the bias voltage on the gate of
Q1401 via Q1404. If the current increases, then the bias voltage decreases in order to keep the
driver's current constant. Since the current must increase with increasing control voltage, an input
path is provided to U1402-2 pin 5 from control line VCNTRL to enable this.
3.3
Final Stage
The final stage uses two LDMOS FET devices operating in parallel. Each device has its own
adjustable gate bias voltage, MOSBIAS_2 and MOSBIAS_3, obtained from D/A outputs of the
ASFIC. These bias voltages are also factory-tuned. If these transistors are replaced, the bias
voltage must be tuned using the Tuner Software. Care must be taken not to damage the device by
exceeding the maximum allowed bias voltage. The device's drain current is drawn directly from the
radio's DC supply voltage input, PASUPVLTG, via current-measurement resistor R1409.
A matching network combines the output of the two devices and provides a 50-ohm source for the
antenna switch and harmonic filter.
3.4
Antenna Switch
The antenna switch is operated by the 9T1 voltage source which forward biases diodes D1401 and
D1402 during transmit, causing them to appear as a low impedance. D1401 allows the RF output
from final stages Q1402 and Q1403 to be applied to the input of the low-pass harmonic filter
(L1421-3 and associated components). D1402 appears as a short circuit at the input of the receiver
(RXINJ), preventing transmitter RF power from entering the receiver. L1420 and C1456 appear as a
broadband _-wave transmission line, making the short circuit presented by D1402 appear as open
circuit at the junction of D1401 and the harmonic filter input.
During receive mode, the 9T1 voltage is not present, and D1401 and D1402 do not conduct and
appear as open circuits. This allows signals from the antenna jack to pass to the receiver input, and
disconnects the transmitter final stages from this path.
3.5
Harmonic Filter
Components L1421-L1423 and C1449-C1455 form a seven-pole elliptic low-pass filter to attenuate
harmonic energy of the transmitter to specifications level. R1411 is used to drain electrostatic
charge that might otherwise build up on the antenna. The harmonic filter also prevents high level RF
signals above the receiver passband from reaching the receiver circuits, improving spurious
response rejection.
3.6
Power Control
The transmitter uses the Power Control IC (PCIC, U1503) to control the power output of the radio. A
differential DC amplifier U1502-1 compares the voltage drop across current-measuring resistor
R1409, which is proportional to the transmitter final stage DC current, with the voltage drop across
resistor R1508 and R1535, which is proportional to the current through transistor Q1503. This
transistor is controlled by the output of the differential amplifier, which varies the transistor Q1503.
This transistor is controlled by the output of the differential amplifier, which varies the transistor
THEORY OF OPERATION