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ページを印刷する9.3 Power Supply Jumpers
The power of every FPGA can be disabled when needed. For this J3_x is placed next to every FPGA, see
Figure 6. By placing the jumper between 1-2 the FPGA are powered as normal, by placing the jumper
between 3-4 the power of the FPGA is disabled.
J3_x
10 LEDs
The power LED is integrated in the ON/OFF switch, the functions of the LED are shown in Table 7.
On the QSFP cage light pipe are placed to show one LED per cage. The function of the LED is determined
by the firmware. The function of the LED for the factory image is shown in Table 8
UniBoard
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OFF
ON
Figure 6 FPGA Power enable jumpers
Table 7 Power LED
LED
Red
Green
Table 8 QSFP Cage LED
LED
Red
Green
2
Manual
State
Power down
Power on
State
???
???
Doc.nr.:
Rev.:0.1
DESP
Date:11/05/2015
Class.:
ASTRON-IS-036 1.0