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Debug Methodology and Failure Isolation

8.
Debug Methodology and Failure Isolation
8.1

Memory

If the memory test finds any bad DIMM(s) (defined as mismatched DIMMs within a row, multi-bit
errors [MBE] detected within a DIMM, single-bit [SBE] non-transient errors within a DIMM), the
entire associated row will be mapped out and autoscan will not include any memory that is
mapped out. The memory test can isolate persistent or non-transient single-bit and multi-bit
errors to the defective DIMM and will make that information available.
If mismatched or bad DIMMs are found during the initial geometry check, the bad row will be
logged to the System Event Log (SEL). If both rows are determined to be bad, the system will
not boot, and the bad row(s) will be logged to SEL. Additionally, the system will emit beep codes
as documented in the post and error codes section.
Assuming that there is at least one good row, the bad row will be reported as an error when
video is available will be logged to the SEL, and the system will continue to boot.
8.1.1

Memory Debug Methodology

Remove memory DIMM, look for bent pins or obvious sign of contamination on DIMM or inside
DIMM site - Reseat the memory; swap ROW one with ROW two (2
reconfigure to minimum memory configuration (4 DIMMs in one ROW, DIMM sites 1,2,3,4 must
be populated at a minimum).
Note: Even though DIMMs are numbered and populated consecutively, DIMM Sites are not
physically consecutive. Refer to the silkscreen on the
DIMMS in order below.
DIMM Sites 1=J9J3, 2=J9J1, 3=J9D3, 4=J9D1 FIRST. Sites 5=J9J2, 6=J8J1, 7=J9J2, 8=J8D1
are optional.
Exchange the memory, one ROW at a time, with a complete set of known good memory. If
failure symptoms persist, suspect the motherboard. If it passes, replace the suspect memory,
one at a time, into their original sockets, until the Failure recurs (if replaced one by one - DDR
must be same size, die and vendor).
8.1.2

Memory Component Isolation

DDR266 memory can be replaced, one by one, with same mfg P/N (same size, die and vendor)
A complete row must be replaced in sets of 4 (minimum config is 4 x 256= 1GB). Populate
DIMM Sites 1=J9J3, 2=J9J1, 3=J9D3, 4=J9D1 FIRST. Sites 5=J9J2, 6=J8J1, 7=J9J2, 8=J8D1
are optional. If failure persists replace the main board.
18
Intel® Server Platform SR870BH2
nd
set of 4 DIMMS)
near each DIMM site – first 4
main board
Revision 1.1