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UHF (403-470MHz) Transmitter Power Amplifier (PA) 40W
5.0
UHF (403-470MHz) Transmitter Power Amplifier (PA) 40W
The radio's 40 W PA is a four stage amplifier used to amplify the output from the VCOBIC to the radio
transmit level. It consists of the following four stages in the line-up. The first stage is a LDMOS
predriver (U4401) that is controlled by pin 4 of PCIC (U4501) via Q4473 (CNTLVLTG). It is followed
by another LDMOS stage (Q4421), an LDMOS stage (Q4431) and a bipolar final stage (Q4441).
From VCO
Controlled
Stage
Vcontrol
To Microprocessor
Device Q4401 is surface mounted. Q4421, Q4431 and Q4441 are directly attached to the heat sink.
5.1
Power Controlled Stage
The first stage (U4401) amplifies the RF signal from the VCO (TXINJ) and controls the output power
of the PA. The output power of the transistor U4401 is controlled by a voltage control line feed from
the PCIC pin4(U4501). The control voltage simultaneously varies the bias of two FET stages within
U4401. This biasing point determines the overall gain of U4401 and therefore its output drive level to
Q4421, which in turn controls the output power of the PA.
In receive mode the voltage control line is at ground level and turns off Q4473 which in turn switches
off the biasing voltage to U4401.
5.2
Pre-Driver Stage
The next stage is a 13dB gain LDMOS device (Q4421) which requires a positive gate bias and a
quiescent current flow for proper operation. The voltage of the line PCIC_MOSBIAS_1 is set in
transmit mode by PCIC pin 24 and fed to the gate of Q4421 via the resistive network R4480, R4416
and R4415. The bias voltage is tuned in the factory.
Pre
PA
PA-Final
Driver
Driver
Stage
Bias 2
A S F I C _ C M P
SPI BUS
Bias 1
Figure 2-1 UHF Transmitter Block Diagram
Pin Diode
Antenna
Switch
Power
Sense
PA
PWR
SET
P C I C
Antenna
Harmonic
Filter
RF Jack
Temperature
Sense
To Microprocessor
2-9