Dynamix RC 908 EV 35 Benutzerhandbuch - Seite 13

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not only prevent long time delay, but also avoid packet loss caused by sudden data
flooding. It is suggested that the buffer size be configured as the following table.
WAN Interface Rate (bit/s)
≥2M
> 1M
> 512K
> 256K
> 64K
≤64K
The 6th bit: TX CLK phase selection switch.
It provides various options for different phase relationships of transmitting data and
TX clocking at V.35 interface between different brands DCE equipment.
OFF: positive phase (default).
ON: negative phase.
The 7th bit: RX CLK phase selection switch.
It provides various options for different phase relationships of receiving data and
RX clocking at V.35 interface between different brands DCE equipment.
OFF: positive phase (default).
ON: negative phase.
The 8th bit: Reserved bit.
The factory default setup of the dip-switch:
DIP-switch 1
ON
OFF
■
Details
Half
duplex
Note:
1. Please use the 1st bit to configure the half/full duplex mode of converters
following the instructions in 2.3 Full Duplex Mode Configuration, Chapter 2.
RC907/908-EV35 User Guide
3rd Bit
OFF
OFF
ON
ON
ON
ON
2
3
4
■
■
■
Fault
Maximum buffer size
Pass
Through
disabled
DIP-switch
4th Bit
5th Bit
OFF
OFF
ON
ON
OFF
ON
ON
OFF
ON
ON
ON
ON
5
6
7
■
■
■
Positive
Positive
phase
phase
8
■
No
Meaning