Fujitsu MB91460 SERIES Anwendungshinweis - Seite 11
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- PLL_4MHZ__CPU__96MHZ_PER_16MHZ_EXT_48MHZ_CAN_16MHZ
Main oscillation
CPU clock (CLKB)
Peripheral clock (CLKP)
Ext. bus clock (CLKT)
CAN clock (CLKCAN)
- PLL_4MHZ__CPU_100MHZ_PER_20MHZ_EXT_50MHZ_CAN_20MHZ
Main oscillation
CPU clock (CLKB)
Peripheral clock (CLKP)
Ext. bus clock (CLKT)
CAN clock (CLKCAN)
- PLL_10MHZ_CPU__60MHZ_PER_20MHZ_EXT_30MHZ_CAN_20MHZ
Main oscillation
CPU clock (CLKB)
Peripheral clock (CLKP)
Ext. bus clock (CLKT)
CAN clock (CLKCAN)
- PLL_20MHZ_CPU__60MHZ_PER_20MHZ_EXT_30MHZ_CAN_20MHZ
Main oscillation
CPU clock (CLKB)
Peripheral clock (CLKP)
Ext. bus clock (CLKT)
CAN clock (CLKCAN)
- CLOCK_USER means that the user configuration defined in the chapter 3.
Note: Not all frequencies are supported by every device. Please see the hardware manual.
Example:
The default configuration with a core frequency of 64 MHz should be selected.
#set
CLOCKSPEED
2.7.2 Select Clock Modulator (CLOMO, CMPR)
The clock modulator is intended for the reduction of electromagnetic interference - EMI, by
spreading the spectrum of the clock signal over a wide range of frequencies.
Available settings for CLOMO:
- ON
- OFF
© Fujitsu Microelectronics Europe GmbH
Start91460.asm
Chapter 2 Settings of the Start91460.asm
= 4 MHz, PLL is activated
= 96 MHZ
= 16 MHZ
= 48 MHZ
= 16 MHz, using PLLx
= 4 MHz, PLL is activated
= 100 MHZ
= 20 MHZ
= 50 MHZ
= 20 MHz, using PLLx
= 10 MHz, PLL is activated
= 60 MHZ
= 20 MHZ
= 30 MHZ
= 20 MHz, using PLLx
= 20 MHz, PLL is activated
= 60 MHZ
= 20 MHZ
= 30 MHZ
= 20 MHz, using PLLx
PLL_4MHZ__CPU__64MHZ_PER_16MHZ_EXT_32MHZ_CAN_16MHZ
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MCU-AN-300021-E-V10