DG NVMe-IP Demo-Anweisungen - Seite 7

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dg_nvmeip_instruction_en.doc
3) Connect power adapter cable from AB16-PCIeXOVR delivery set to power connector on
FPGA board, on AB16-PCIeXOVR board, and on Xilinx power adapter as shown in Figure
2-6.
Figure 2-6 Connect power adapter cable to FPGA board, AB16, and Xilinx adapter
4) Connect A Side of PCIe connector on AB16-PCIeXOVR board to PCIe connector on Xilinx
development board, as shown in Figure 2-7. Also, check that two mini jumpers are
inserted at J5 connector on AB16.
Figure 2-7 Connect PCIe connector between AB16 and FPGA board
30-Nov-17
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