HP 226824-001 - ProLiant - ML750 Übersicht - Seite 16

Blättern Sie online oder laden Sie pdf Übersicht für Desktop HP 226824-001 - ProLiant - ML750 herunter. HP 226824-001 - ProLiant - ML750 20 Seiten. Visualization and acceleration in hp proliant servers
Auch für HP 226824-001 - ProLiant - ML750: Häufig gestellte Fragen (4 seiten), Handbuch zur Umsetzung (35 seiten), Technisches Weißbuch (12 seiten), Firmware-Aktualisierung (9 seiten), Handbuch zur Umsetzung (26 seiten), Einführung Handbuch (22 seiten), Handbuch zur Fehlersuche (18 seiten), Handbuch zur Umsetzung (11 seiten), Installationshandbuch (2 seiten), Konfigurationshandbuch (2 seiten), Einführung Handbuch (19 seiten), Handbuch aktualisieren (9 seiten), Handbuch aktualisieren (16 seiten), Einführung Handbuch (12 seiten), Einführung Handbuch (10 seiten), Technologie-Brief (9 seiten)

Consequently, JEDEC developed the Fully-Buffered DIMM (FB-DIMM) specification, a serial interface

that eliminates the parallel stub-bus topology and allows higher memory bandwidth while maintaining

or increasing memory capacity.

FB-DIMM architecture

The FB-DIMM architecture has serial links between the memory controller and the FB-DIMMs, which

are connected in a daisy chain configuration (Figure 15). Relative to the memory controller, there are

10 outbound links and 14 inbound links, also known as southbound and northbound links,

respectively. These serial links connect the memory controller to an advanced memory buffer (AMB)

chip that resides on each FB-DIMM, creating a point-to-point architecture. The outbound links transmit

commands and write data to the FB-DIMMs while the inbound links transmit read data back to the

memory controller.

The clock signal is distributed over a different set of pins. In addition to communicating over the

Outbound lanes, the memory controller communicates configuration information with each AMB over

the SMBus. The AMB is an intelligent chip that manages serial communication with the memory

controller and parallel communication with local DRAM devices. Each AMB receives signals (address,

write data, and command information) through the outbound links and re-transmits the signal to the

next FB-DIMM on the channel. Each AMB decodes the command data and ignores the commands that

are targeted for a different DIMM. The targeted AMB performs a read or write operation to local

DRAM devices through a parallel interface. In the case of a read operation, the AMB serializes data

from the DRAM devices and transmits it to the memory controller through the inbound links.

Figure 15. Serial communication between daisy-chained FB-DIMMs on a single channel.

When using DDR2-667 DRAM on the FB-DIMM, the peak theoretical throughput of the inbound links

is 5.4 GB/s. The peak theoretical throughput of the outbound links is half the amount of data as the

inbound links, approximately 2.6 GB/s.