Pioneer MJ-HX3000 Service-Handbuch - Seite 30
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MJ-HX5000, MJ-HX3000, MJ-HX2000, MJ-HX700
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3 7 63 1515 0
7.2 PARTS
7.2.1 IC
7 52186 (AK4518-VF-E2) (AD/DA PCB ASSY : IC801)
7 AD/DA Converter IC
¶ Block Diagram
AINL
6
VCML
5
AINR
3
VCMR
4
VRAD
2
VRDA
1
VCOM
21
AOUTL
19
AOUTR
20
¶ Pin Arrangement
TE
L 13942296513
No.
Pin Name
I/O
1
VRDA
I
Reference voltage input for DAC and VA
2
VRAD
I
Reference voltage input for ADC and VA
3
AINR
I
R ch analog input
R ch common voltage output , 0.45 × VA
4
VCMR
O
Connect an electrolytic capacitor (about 4.7µF) and a ceramic capacitor (0.1µF) between this pin and AGND.
L ch common voltage output , 0.45 × VA
5
VCML
O
Connect an electrolytic capacitor (about 4.7µF) and a ceramic capacitor (0.1µF) between this pin and AGND.
6
AINL
I
L ch analog input
7
PWAD
I
ADC power down mode L: power down
8
PWDA
I
DAC power down mode L: power down
9
MCLK
I
Master clock input
10
LRCK
I
Input/output channel clock pin
11
SCLK
I
Audio serial data clock pin
12
SDTO
O
Audio serial data output
−
13
DGND
Digital ground
−
14
VD
Digital power supply
15
SDTI
I
Audio serial data input
16
CMODE
I
Master clock selection "H": 384fs or 512fs, "L": 256fs
17
DEM1
I
Deemphasis frequency selection
18
DEM0
19
AOUTL
O
L ch analog output
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20
AOUTR
O
R ch analog output
Common voltage output , 0.45 × VA
21
VCOM
O
Connect an electrolytic capacitor (about 4.7µF) and a ceramic capacitor (0.1µF) between this pin and AGND.
−
22
AGND
Analog ground pin
.
−
23
VB
Substraight pin
−
24
VA
Analog power supply
30
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VA
AGND
VB
VD
24
22
23
14
∆Σ
Modulator
∆Σ
Modulator
Common Voltage
∆Σ
LPF
Modulator
∆Σ
LPF
Modulator
7
8
PWAD
PWDA
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y
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http://www.xiaoyu163.com
2 9
8
¶ The information shown in the list is basic information and may not
correspond exactly to that shown in the schematic diagrams.
DGND
13
Decimation
Clock
Filter
Divider
Decimation
Filter
Serial I/O
Interface
8×
Interpolator
8×
Interpolator
18
DEM0
Q Q
3
6 7
1 3
Function
.
9 4
2 8
9
MCLK
16
CMODE
10
LRCK
11
SCLK
12
SDTO
15
SDTI
17
DEM1
1 5
0 5
8
2 9
9 4
m
co
9 9
2 8
9 9