Yamaha RX-V800RDS Service-Handbuch - Seite 15

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DSP 0dB [Remote control code: 7A-91 (PRG 10)]
[2ch source]
ANALOG
CODEC
(A/D)
AK4527
DIGITAL
[Multi ch source]
ANALOG
CODEC
(A/D)
AK4527
DIGITAL
DSP FULL BIT [Remote control code: 7A-92 (PRG 11)]
• C/SWFR, FL/FR, RL/RR signals are output through DSP (see the signal path
in the figure below) without using the external DRAM. (Head margin included)
Head margin:
Main L/R: 0dBFS, Center: -6dBFS, Rear Center: -3dBFS, FL/FR: -6dBFS, RL/
RR: -12dBFS, SWFR: Add L/R signal at -20dBFS.
INTERNAL
L/R
DIR
AC3D3 YSS928
INTERNAL
L/R
DIR
L/R
L/R
AC3D3 YSS928
SDOxx represents a terminal name of AC3D3.
The shaded square (
operate.
• The signal is output in digital full bit without including the head margin.
• The same applies as "DSP 0dB" except that the digital data is output in full bit
at D/A.
• However, the SWFR signal is not output in full bit.
RX-V800/RX-V800RDS/HTR-5280
L/R
SDOA0
Main DSP
(Decoder)
L/R
L/R
SDOB1
L/R
SDOB2
L/R
SDOB3
Sub DSP
4M DRAM
L/R
SDOA0
Main DSP
(Decoder)
LS/RS
C/LFE
C/LFE
SDOB1
SDOB2
LS/RS
SDOB3
Sub DSP
4M DRAM
) means that the element indicated in it does not
L
D/A
R
AK4393
C
CODEC
SWFR
(D/A)
FL
FR
RL
RR
AK4527
L
D/A
R
AK4393
C
CODEC
SWFR
(D/A)
FL
FR
RL
RR
AK4527
14