Cypress CY62128B Spezifikation
Blättern Sie online oder laden Sie pdf Spezifikation für Computer Hardware Cypress CY62128B herunter. Cypress CY62128B 12 Seiten. Mobl 1-mbit (128k x 8) static ram
Features
• Temperature Ranges
— Commercial: 0°C to 70°C
— Industrial: –40°C to 85°C
— Automotive: –40°C to 125°C
• 4.5V–5.5V operation
• CMOS for optimum speed/power
• Low active power
(70 ns, LL version, Commercial, Industrial)
— 82.5 mW (max.) (15 mA)
• Low standby power
(70 ns, LL version, Commercial, Industrial)
— 110 µW (max.) (15 µA)
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE
Logic Block Diagram
Note:
1.
For best-practice recommendations, please refer to the Cypress application note "System Design Guidelines" on http://www.cypress.com.
Cypress Semiconductor Corporation
Document #: 38-05300 Rev. *C
, CE
, and OE options
1
2
INPUT BUFFER
A 0
A 1
A 2
A 3
A 4
512x 256x 8
A 5
ARRAY
A 6
A 7
A 8
POWER
COLUMN
CE 1
DOWN
DECODER
CE 2
WE
OE
•
3901 North First Street
1-Mbit (128K x 8) Static RAM
Functional Description
The CY62128B is a high-performance CMOS static RAM
organized as 131,072 words by 8 bits. Easy memory
expansion is provided by an active LOW Chip Enable (CE
an active HIGH Chip Enable (CE
Enable (OE), and three-state drivers. This device has an
automatic
power-down
feature
consumption by more than 75% when deselected.
Writing to the device is accomplished by taking Chip Enable
One (CE
) and Write Enable (WE) inputs LOW and Chip
1
Enable Two (CE
) input HIGH. Data on the eight I/O pins (I/O
2
through I/O
) is then written into the location specified on the
7
address pins (A
through A
0
16
Reading from the device is accomplished by taking Chip
Enable One (CE
) and Output Enable (OE) LOW while forcing
1
Write Enable (WE) and Chip Enable Two (CE
these conditions, the contents of the memory location
specified by the address pins will appear on the I/O pins.
The eight input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH or CE
LOW), the outputs are disabled (OE HIGH), or
2
during a write operation (CE
LOW, CE
1
The CY62128B is available in a standard 450-mil-wide SOIC,
32-pin TSOP type I and STSOP packages.
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
,
•
San Jose
CA 95134
CY62128B
MoBL
[1]
), an active LOW Output
2
that
reduces
power
).
) HIGH. Under
2
through I/O
) are placed in a
0
7
HIGH, and WE LOW).
2
•
408-943-2600
Revised March 7, 2005
®
),
1
0
1
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