Cypress CY62128EV30 Spezifikationsblatt - Seite 6
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Switching Waveforms
ADDRESS
DATA OUT
PREVIOUS DATA VALID
ADDRESS
CE
OE
HIGH IMPEDANCE
DATA OUT
t
V
PU
CC
SUPPLY
CURRENT
ADDRESS
CE
WE
OE
NOTE 20
DATA IO
Notes
15. The device is continuously selected. OE, CE
16. WE is HIGH for read cycle.
17. Address valid before or similar to CE
18. Data IO is high impedance if OE = V
19. If CE
goes HIGH or CE
goes LOW simultaneously with WE HIGH, the output remains in high impedance state.
1
2
20. During this period, the IOs are in output state. Do not apply input signals.
Document #: 38-05579 Rev. *D
Figure 2. Read Cycle 1 (Address transition controlled)
t
AA
t
OHA
Figure 3. Read Cycle No. 2 (OE controlled)
t
RC
t
ACE
t
DOE
t
LZOE
t
LZCE
50%
Figure 4. Write Cycle No. 1 (WE controlled)
t
SCE
t
AW
t
SA
t
HZOE
= V
, CE
= V
.
1
IL
2
IH
transition LOW and CE
transition HIGH.
1
2
.
IH
[15, 16]
t
RC
RC
[10, 16, 17]
DATA VALID
[10, 15, 18, 19]
t
WC
t
PWE
t
SD
DATA VALID
CY62128EV30
DATA VALID
t
HZOE
t
HZCE
HIGH
IMPEDANCE
t
PD
I
CC
50%
I
t
HA
t
HD
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