Cypress Semiconductor CY7B991 Spezifikationsblatt - Seite 10

Blättern Sie online oder laden Sie pdf Spezifikationsblatt für Computer Hardware Cypress Semiconductor CY7B991 herunter. Cypress Semiconductor CY7B991 20 Seiten. Cypress programmable skew clock buffer specification sheet

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Switching Characteristics
[2, 13]
Over the Operating Range
Parameter
f
Operating Clock
NOM
Frequency in MHz
t
REF Pulse Width HIGH
RPWH
t
REF Pulse Width LOW
RPWL
t
Programmable Skew Unit
U
t
Zero Output Matched-Pair Skew
SKEWPR
[16, 17]
(XQ0, XQ1)
t
Zero Output Skew (All Outputs)
SKEW0
t
Output Skew (Rise-Rise, Fall-Fall, Same
SKEW1
Class Outputs)
t
Output Skew (Rise-Fall, Nominal-Inverted,
SKEW2
Divided-Divided)
t
Output Skew (Rise-Rise, Fall-Fall, Different
SKEW3
Class Outputs)
t
Output Skew (Rise-Fall, Nominal-Divided,
SKEW4
Divided-Inverted)
t
Device-to-Device Skew
DEV
t
Propagation Delay, REF Rise to FB Rise
PD
t
Output Duty Cycle Variation
ODCV
t
Output HIGH Time Deviation from 50%
PWH
t
Output LOW Time Deviation from 50%
PWL
t
Output Rise Time
ORISE
t
Output Fall Time
OFALL
t
PLL Lock Time
LOCK
t
Cycle-to-Cycle Output
JR
Jitter
Document Number: 38-07138 Rev. *B
(continued)
Description
[1, 2]
FS = LOW
[1, 2]
FS = MID
[1, 2]
FS = HIGH
[16, 18]
[16, 19]
[16, 19]
[16, 19]
[16, 19]
[14, 22]
[22]
[23, 24]
[23, 24]
[23, 25]
[23, 25]
[26]
[14]
RMS
[14]
Peak-to-Peak
CY7B991–7
Min
Typ
Max
Min
15
30
25
50
40
80
5.0
5.0
5.0
5.0
See Table 1
0.1
0.25
0.3
0.75
0.6
1.0
1.0
1.5
0.7
1.2
1.2
1.7
1.65
–0.7
0.0
+0.7
–0.7
–1.2
0.0
+1.2
–1.5
3
3.5
0.15
1.5
2.5
0.5
0.15
1.5
2.5
0.5
0.5
25
200
CY7B991
CY7B992
CY7B992–7
Typ
Max
Unit
15
30
MHz
25
50
[15]
40
80
ns
ns
0.1
0.25
ns
0.3
0.75
ns
0.6
1.0
ns
1.0
1.5
ns
0.7
1.2
ns
1.2
1.7
ns
1.65
ns
0.0
+0.7
ns
0.0
+1.5
ns
5.5
ns
5.5
ns
3.0
5.0
ns
3.0
5.0
ns
0.5
ms
25
ps
200
ps
Page 10 of 19
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