Cypress Semiconductor CY7C1034DV33 Spezifikationsblatt - Seite 6

Blättern Sie online oder laden Sie pdf Spezifikationsblatt für Computer Hardware Cypress Semiconductor CY7C1034DV33 herunter. Cypress Semiconductor CY7C1034DV33 10 Seiten. 6-mbit (256k x 24) static ram

Switching Waveforms

ADDRESS
DATA OUT
PREVIOUS DATA VALID
ADDRESS
CE
OE
HIGH IMPEDANCE
DATA OUT
V
CC
SUPPLY
CURRENT
ADDRESS
CE
WE
DATA IO
Notes
13. Device is continuously selected. OE, CE = V
14. WE is HIGH for read cycle.
15. Address valid before or similar to CE transition LOW.
16. Data IO is high impedance if OE = V
17. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high impedance state.
Document Number: 001-08351 Rev. *C
Figure 4. Read Cycle No. 1 (Address Transition Controlled)
t
AA
t
OHA
Figure 5. Read Cycle No. 2 (OE Controlled)
t
ACE
t
DOE
t
LZOE
t
LZCE
t
PU
50%
Figure 6. Write Cycle No. 1 (CE Controlled)
t
SA
t
AW
.
IL
.
IH
t
RC
RC
[3, 14, 15]
t
RC
DATA VALID
[3, 16, 17]
t
WC
t
SCE
t
SCE
t
PWE
t
SD
DATA VALID
CY7C1034DV33
[13, 14]
DATA VALID
t
HZOE
t
HZCE
HIGH
IMPEDANCE
t
PD
50%
t
HA
t
HD
Page 6 of 9
ICC
ISB
[+] Feedback