Cypress Semiconductor CY7C1298H Spezifikationsblatt - Seite 16

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Document History Page
Document Title: CY7C1298H 1-Mbit (64K x 18) Pipelined DCD Sync SRAM
Document Number: 38-05665
REV.
ECN NO. Issue Date
**
343896
See ECN
*A
430678
See ECN
*B
481916
See ECN
Document #: 38-05665 Rev. *B
Orig. of
Change
PCI
New Data Sheet
NXR
Changed address of Cypress Semiconductor Corporation on Page# 1 from
"3901 North First Street" to "198 Champion Court"
Added 2.5VI/O option
Changed Three-State to Tri-State
Included Maximum Ratings for V
Modified "Input Load" to "Input Leakage Current except ZZ and MODE" in the
Electrical Characteristics Table
Modified test condition from V
Replaced Package Name column with Package Diagram in the Ordering
Information table
VKN
Converted from Preliminary to Final.
Updated the Ordering Information table.
Description of Change
relative to GND
DDQ
< V
< V
to V
IH
DD
IH
DD
CY7C1298H
Page 16 of 16
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