Cypress Semiconductor CY7C1324H Spezifikationsblatt - Seite 15

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Document History Page
Document Title: CY7C1324H 2-Mbit (128K x 18) Flow-Through Sync SRAM
Document Number: 001-00208
REV.
ECN NO. Issue Date
**
347377
See ECN
*A
428408
See ECN
*B
459347
See ECN
Document #: 001-00208 Rev. *B
Orig. of
Change
PCI
New Data Sheet
NXR
Converted from Preliminary to Final.
Changed address of Cypress Semiconductor Corporation on Page# 1 from
"3901 North First Street" to "198 Champion Court"
Removed 100 MHz Speed-bin
Changed Three-State to Tri-State.
Modified "Input Load" to "Input Leakage Current except ZZ and MODE" in the
Electrical Characteristics Table.
Modified test condition from V
Replaced Package Name column with Package Diagram in the Ordering
Information table.
Updated the Ordering Information Table.
Replaced Package Diagram of 51-85050 from *A to *B
NXR
Included 2.5V I/O option
Updated the Ordering Information table.
CY7C1324H
Description of Change
< V
< V
to V
IH
DD
IH
DD
Page 15 of 15
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