Cypress Semiconductor S6SAP412A Betriebshandbuch - Seite 8

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3. PIN descriptions

3.1 Input/output pin descriptions

Block
DD1
DD2
DD3
CTL
MODE
2
I
C
COMMON

3.2 Jumper, Switch descriptions

Jumper, Switch
JP1
CN1
S6SAP412A 2ch Buck + 1ch Buck/Boost DC/DC Evaluation Board Operation Guide, Doc. No. 002-08676 Rev. *A
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Table 3-1. Input/output pin descriptions
Pin symbol
I/O
Vo1
O
PG1
O
Vo2
O
PG2
O
Vo3
O
PG3
O
CTL1
I
CTL2
I
CTL3
I
CTLM
I
MODE
I
DVCC
I
SCL
I
SDA
I/O
ADDS
I
VIN
I
GND
-
GND3
-
Table 3-2. Jumper, Switch Descriptions
Short VIN terminal and VBUS pin (2 pin)
1,8,12,14,17 : GND pin
2 : VIN pin
4 : DVCC pin
5 : SCL pin
6 : SDA pin
3,7,9,10,11,13,15,16,18,19,20 : open
Function description
DD1 output terminal
DD1 POWERGOOD output monitor terminal
DD2 output terminal
DD2 POWERGOOD output monitor terminal
DD3 output terminal
DD3 POWERGOOD output monitor terminal
DD1 control terminal
DD2 control terminal
DD3 control terminal
Control terminal for common block and logic block
MODE signal output terminal
2
Power supply terminal for I
C.
2
I
C clock terminal
2
I
C data I/O terminal
Select terminal for slave address
Control circuit block power supply terminal
Control circuit block ground terminal
Control circuit block ground terminal
Description
Initial Setting
Open
-
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