EG&G ORTEC 775 Betriebs- und Wartungshandbuch - Seite 10
Blättern Sie online oder laden Sie pdf Betriebs- und Wartungshandbuch für Kassenschalter EG&G ORTEC 775 herunter. EG&G ORTEC 775 18 Seiten.
4.4. COUNTING SETUP WITH 775 AND
771 TIMER-COUNTER
An ORTEC 771 Timer-Counter can be used to control the
time in a counting interval while input pulses are being
counted in the 775. The setup Is made by connecting a
cable from the Interval output BNC on the rear panel of the
771 to the Gate Input on either the front or rear panel of
the
775. This
interconnection
wil l
allow
the 775 to
accumulate input counts only during the interval when the
771 is counting time. Use theTollowIng procedure:
1. On the 775 set the Count/Stop switch at Count.
2. With no Gate input connection and with the light
indicating that the 775 is in a counting condition, check to
see that Input pulses are able to be counted. Readjust the
Discriminator level if necessary.
3. Set the Count/Stop switch at Stop and press Reset.
4. Connect the Gate input cable from the 771 Interval
output to the 775 Gate input.
5. On the 771 set the Count/Stop switch at Stop.
6. On the 775 set the Count/Stop switch at Count.
7. The instruments are ready to be used. When the
counting interval is to be started, set the 771 Count/Stop
switch at Count, and both modules should be in a counting
condition. At the end of the selected time Interval on the
771, preset stop wil l affect both modules. To stop the
counting interval manually, use the Count/Stop switch on
the 771 and read the time for the interval on the 771.
If In the setup just described the 771 Timer-Counter had
been operated as a counter, the 775 data would have
represented the number of counts above its threshold per N
(preset condition) counts from another source Into the 771.
The ratio of two counting rates can be determined in this
manner.
5. CIRCUIT DESCRIPTION
5.1. GENERAL DESCRIPTION
The ORTEC 775 Counter is a 6-decade ripple sealer
preceded by a precise l inear discriminator and includes logic
for gating. An internal osci l lator drives a 7-state ring
scanner with a BCD-to-decimal decoder to control the
6-diglt LED display. See schematic 775-010TS1 at the back
of the manual for circuit detai ls.
5.2. PULSE INPUT CIRCUIT
Input signals in the range of 0.1 through 10 V can be
applied through either the front or rear panel BNC Input
connector. They are dc-coupled through divider R41 and
R42 to the positive input of comparator IC 24. The
negative Input to IC 24 is the dc level selected with
Discriminator control R65 on the front panel. Each input
pulse whose amplitude exceeds the discrimination level wi l l
generate a logic output from IC 24-7 to drive IC 9-8. If the
775 is not being reset and its Gate indicator l ight is l ighted,
the Input pulse becomes a clock pulse into the least
significant decade, IC 10, and Is counted.
With no Gate input signal and with switch S3 set at Count,
IC 19-6 is high and IC 20-8 is low, making IC 19-11 high
and permitting IC 9-6 to pass the Input pulse. If the switch
is set at Stop, IC 20-8 goes high and the gate is inhibiting.
Likewise, If there is a Gate input connection and the signal
is dropped to <+1.5 V, IC 20-8 goes high and the gate Is
inhibited. One of the functions of IC 19-11 is to drive the
input to IC 20-1 2 and l ight LED 1 when the gate is enabled.
During the interval of a reset signal, IC 21-11 goes low and
this drives IC 20-12 high and turns off LED 1 ; any input
during this interval wil l not be counted because IC 19-3 is
low and gate IC 9-6 inhibits the Input pulse.
5.3.
COUNTING DECADES
The type 7490 circuits, IC 10 through IC 15, are the
counting decades. The gated Input pulses are used as clock
input pulses to IC 10, and the overflow from each of the
decades Is the clock pulse for the next more significant
decade. The overflow output from IC 15 triggers flip-flop
IC 22-11 and IC 22-8 to l ight LED 2 unti l the next reset.
The same pulse is shaped for an Overflow output signal
through CN6 by
monostable Q16 and
IC 23-8 and
emitter-follower 017. If there is more than one overflow,
each overflow wil l generate an output pulse.
The 1-2-4-8 BCD state of each decade is available through
four output lines. The states of all four output l ines for each
decade are gated onto common l ines through IC 1 to IC 6.
Gating is controlled by a ring scanner, and the coded
combination for each digit Is gated onto the common l ines
individual ly and sequentially.
Osci l lator IC 23-2 and IC 23-4 is a free-running multi
vibrator with a period of about 1 msec. Its output is used to
drive the clock Input of decade counter IC 16. The BCD
output from IC 16 is decoded to decimal numbers in IC 8,
and each of the decoded states 0 through 5 enables the gate
for a selected decade and enables the comparable character