Acer AL2021 Manual de servicio - Página 43
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+1.8V_CORE
GND
+2.5V_DDR
GND
+3.3V_I/O_MALIBU
GND
+1.8V_DVI
+3.3V_DVI
GND
GND
+3.3V_PLL
Route (VIN1/ADC_IN1, ADC1_RETURN) and
(VIN2/ADC_IN2, ADC2_RETURN) as differential
tracks close to each other and ground the
return track of each pair very close to the
Malibu D12 ball and ground pin
Optional Filter Caps in between a pair on LBADC differential tracks close
to the
Malibu chip
ADC_IN1
C51
ADC1_RETURN
0.1uF/6
ADC_IN2
GND
C50
0.1uF/6
ADC2_RETURN
GND
+3.3V_LBADC
+3.3V_DIG
R33
10K/6
R31
10K/6
LED2_KEYPAD
LED_KEYPAD
CN4
R44
10K/6
R45
10K/6
1
R49
22/6
ADC_IN2
2
R53
22/6
ADC_IN1
LED_GRN
3
R60
22/6
4
R66
22/6
LED_ORANGE
5
R116 22/6
LED_BLUE
+
C49
6
22uF/25V
CN3
1
4501-06P-R
GND
2
3
GND
4
KeyPad connector
4606-04-04P-R/NS
+12V
R27
1K/6
R117 0/6
LED_ORANGE
LED_GRN
R28
1K/6
R118 0/6
LED_KEYPAD
R30
4.7K/6
1
LED2_KEYPAD
R32
4.7K/6
1
GND
+12V
FSVREF
6
+1.8V_ADC
R119
C38
C39
1K/6
C63
C62
R120 100/6
0.1uF/6
0.1uF/6
0.1uF/6
0.1uF/6
GND
+3.3V_ADC
GND
LED2_KEYPAD
R121
4.7K/6
1
C70
C168
C175
C171
C169
22uF/25V
0.1uF/6
0.1uF/6
0.1uF/6
0.1uF/6
R122
1K/6
+3.3V_PLL
GND
C77
GND
22uF/25V
25V
GND
+3.3V_LVDSA
+3.3V_LVDS
C47
C44
C131
C133
C132
0.1uF/6
22uF/25V
0.1uF/6
0.1uF/6
0.1uF/6
25V
+3.3V_LVDSB
GND
GND
C52
C144
C142
C148
22uF/25V
0.1uF/6
0.1uF/6
0.1uF/6
25V
GND
+3.3V_LBADC
+1.8V_CORE
+3.3V_I/O_MALIBU
+2.5V_DDR
N4
3
DVI_SCL
DVI_SCL
N3
3
DVI_SDA
DVI_SDA
A8
3
RX0+
RX0+
B8
3
RX0-
RX0-
A9
3
RX1+
RX1+
B9
3
RX1-
RX1-
A10
3
RX2+
RX2+
B10
3
RX2-
RX2-
A6
3
RXC+
RXC+
B6
3
RXC-
RXC-
D5
NO_CONNECT
C5
NO_CONNECT
R54
249 1%
B11
+3.3V_DVI
REXT
B1
3
BLUE-
BLUE-
B2
3
BLUE+
BLUE+
C1
3
GREEN-
GREEN-
C2
3
GREEN+
GREEN+
D1
3
RED-
RED-
D2
3
RED+
RED+
C3
3
SOG
SOG
A1
NO_CONNECT
+3.3V_PLL
N2
3
VGA_SCL
VGA_SCL
N1
3
VGA_SDA
VGA_SDA
22pF/6
C67
L4
3
AHS
AHSYNC
C68
22pF/6
L3
3
AVS
AVSYNC
R4
EXTCLK
X1
XTAL
G4
XTAL
TCLK
G3
TCLK
14.318MHz
F1
NO_CONNECT
K3
NO_CONNECT
R77
3.3K
ACS_RSET_HD
K2
ACS_RSET_HD
C19
VRED0
GND
B19
VRED1
A19
VRED2
D18
VRED3
C18
VRED4
B18
VRED5
A18
VRED6
C17
VRED7
R78
10K/6
A23
VGRN0
C22
VGRN1
B22
VGRN2
A22
VGRN3
GND
D21
VGRN4
C21
VGRN5
B21
VGRN6
A21
VGRN7
B25
VBLU0
A25
VBLU1
D24
VBLU2
C24
VBLU3
R37
B24
VBLU4
10K/6
A24
VBLU5
C23
VBLU6
B23
VBLU7
GND
A20
VCLK
B20
VODD
C20
VVS
D19
VHS_CSYNC
D20
VDV
B17
VCLAMP
PWM0
C26
7
PWM0
PWM0
PWM1
C25
7
PWM1
PWM1
PWM2
D26
PWM2
D25
OCM_TIMER1
ADC_IN3
A12
GND
LBADC_IN3
B12
LBADC_IN2
C12
LBADC_IN1
D12
GND
LBADC_RETURN
C16
SVDATA0
B16
SVDATA1
+5V
A16
SVDATA2
D15
SVDATA3
TXD
C15
SVDATA4
RXD
B15
SVDATA5
A15
SVDATA6
D14
SVDATA7
A17
SVDV
A14
SVODD
GND
B14
SVVSYNC
C14
SVHSYNC
D16
SVCLK
M1
OCM_UDO
M2
OCM_UDI
/RESET
K1
/RESET
IR1
M4
GND
IR1
IR0
M3
GND
IR0
MSTR_SCL
P4
MSTR_SCL
MSTR_SCL
MSTR_SDA
P3
MSTR_SDA
MSTR_SDA
/OCM_WE
R3
6
/OCM_WE
/OCM_WE
/OCM_RE
R2
6
/OCM_RE
/OCM_CS
/OCM_RE
R1
6
/ROM_CS
/ROM_CS
L1
/OCM_INT2
L2
/OCM_INT1
P2
/OCM_CS2
P1
/OCM_CS1
T4
/OCM_CS0
OCMADDR[0..19]
OCMADDR19
T3
OCMADDR19
OCMADDR18
T2
OCMADDR18
OCMADDR17
T1
OCMADDR17
OCMADDR16
U4
OCMADDR16
LED_BLUE
OCMADDR15
U3
OCMADDR15
OCMADDR14
U2
OCMADDR14
OCMADDR13
U1
OCMADDR13
OCMADDR12
V4
OCMADDR11
OCMADDR12
V3
OCMADDR11
OCMADDR10
V2
OCMADDR10
OCMADDR9
V1
OCMADDR8
OCMADDR9
W3
OCMADDR8
OCMADDR7
W2
OCMADDR7
OCMADDR6
W1
OCMADDR5
OCMADDR6
Y3
OCMADDR5
OCMADDR4
Y2
OCMADDR4
OCMADDR3
Y1
OCMADDR3
OCMADDR2
AA3
OCMADDR2
OCMADDR1
AA2
OCMADDR1
OCMADDR0
AA1
OCMADDR0
AB3
OCMDATA15
AB2
OCMDATA14
AB1
OCMDATA13
AC3
OCMDATA12
AC2
OCMDATA11
AC1
OCMDATA10
AD1
OCMDATA9
AE1
6
OCMDATA[0..7]
OCMDATA8
OCMDATA7
AF1
OCMDATA7
OCMDATA6
AD2
OCMDATA6
OCMDATA5
AE2
OCMDATA5
OCMDATA4
AF2
OCMDATA4
OCMDATA3
AD3
OCMDATA3
OCMDATA2
AE3
OCMDATA2
OCMDATA1
AF3
OCMDATA1
OCMDATA0
AD4
OCMDATA0
+3.3V_LVDSB
+3.3V_LVDSA
+3.3V_LVDS
FSVREF
+1.8V_DVI
+3.3V_DVI
+1.8V_ADC
+3.3V_ADC
+3.3V_PLL
U5
GM9160
416PBGA
FSDATAU0
E24
FSDATA0
E25
FSDATAU1
FSDATA1
E26
FSDATAU2
FSDATA2
FSDATAU3
G26
FSDATA3
G24
FSDATAU4
FSDATA4
H26
FSDATAU5
FSDATA5
H24
FSDATAU6
FSDATA6
FSDATAU7
J25
FSDATA7
T26
FSDATAU8
FSDATA8
R25
FSDATAU9
FSDATA9
P24
FSDATAU10
FSDATA10
P26
FSDATAU11
FSDATA11
N24
FSDATAU12
FSDATA12
FSDATAU13
N26
FSDATA13
M25
FSDATAU14
FSDATA14
L24
FSDATAU15
FSDATA15
FSDATAU16
L25
FSDATA16
M26
FSDATAU17
FSDATA17
M24
FSDATAU18
FSDATA18
FSDATAU19
N25
FSDATA19
N23
FSDATAU20
FSDATA20
P25
FSDATAU21
FSDATA21
R26
FSDATAU22
FSDATA22
R24
FSDATAU23
FSDATA23
K24
FSDATAU24
FSDATA24
J26
FSDATAU25
FSDATA25
H25
FSDATAU26
FSDATA26
G23
FSDATAU27
FSDATA27
G25
FSDATAU28
FSDATA28
FSDATAU29
F24
FSDATA29
F25
FSDATAU30
FSDATA30
F26
FSDATAU31
FSDATA31
FSADDRU0
AD25
FSADDR0
AD26
FSADDRU1
FSADDR1
AC24
FSADDRU2
FSADDR2
AC25
FSADDRU3
FSADDR3
AB26
FSADDRU4
FSADDR4
AA24
FSADDRU5
FSADDR5
AA25
FSADDRU6
FSADDR6
AA26
FSADDRU7
FSADDR7
Y24
FSADDRU8
FSADDR8
AB25
FSADDRU9
FSADDR9
FSADDRU10
AC26
FSADDR10
AB24
FSADDRU11
FSADDR11
FSCLKU+
U24
FSCLKp
U23
FSCLKU-
FSCLKn
FSDQSU
L26
FSDQS
T25
FSDQMU0
FSDQM0
U25
FSDQMU1
FSDQM1
U26
FSDQMU2
FSDQM2
T24
FSDQMU3
FSDQM3
V26
/FSWEU
FSWE
V25
/FSCASU
FSCAS
V24
/FSRASU
FSRAS
W26
FSCKEU
FSCKE
FSBKSELU0
Y25
FSBKSEL0
Y26
FSBKSELU1
FSBKSEL1
AC18
GPIO_G06_B0
AD18
GPIO_G06_B1
AE18
GPIO_G06_B2
AF18
GPIO_G06_B3
AE19
A3+
AF19
A3-
AE20
AC+
AF20
AC-
AD21
GPIO_G05_B0
AD22
GPIO_G05_B3
AE21
A2+
AF21
A2-
AE22
A1+
AF22
A1-
AE23
A0+
AF23
A0-
AD23
GPIO_G04_B0
AD24
GPIO_G04_B1
AE24
GPIO_G04_B2
AF24
GPIO_G04_B3
AF25
GPIO_G04_B4
AF26
GPIO_G04_B5
AE25
GPIO_G04_B6
AE26
GPIO_G04_B7
AE8
GPIO_G07_B0
AF8
GPIO_G07_B1
AC9
GPIO_G07_B2
AD9
GPIO_G07_B3
AE9
GPIO_G07_B4
AF9
GPIO_G07_B5
AD10
GPIO_G07_B6
AE10
GPIO_G07_B7
AF10
LVDS_SHIELD[0]
AC11
LVDS_SHIELD[1]
AD11
LVDS_SHIELD[2]
AE11
LVDS_SHIELD[3]
AF11
B3+
AF12
B3-
AE12
BC+
AF13
BC-
AE13
LVDS_SHIELD[4]
AD14
LVDS_SHIELD[5]
AF14
B2+
AE14
B2-
AF15
B1+
AE15
B1-
AF16
B0+
AE16
B0-
AC7
DCLK
AF17
GPIO_14/DHS
AD16
GPIO_15/DVS
AD7
GPIO_16/DEN
AD8
GPIO_G08_B5/JTAG_RESET
AF7
GPIO_G08_B4/JTAG_TDO
AE7
GPIO_G08_B3
AF6
GPIO_G08_B2/JTAG_TDI
AE6
GPIO_G08_B1/JTAG_MODE
AD6
GPIO_G08_B0/JTAG_CLK
AF5
GPIO_G09_B5
AE5
GPIO_G09_B4
AD5
GPIO_G09_B3
AC5
GPIO_G09_B2
AF4
GPIO_G09_B1
AE4
GPIO_G09_B0
A26
PPWR
B26
PBIAS
AC17
NO_CONNECT
AC16
OEXTR
AD15
D_GND
GND
GND
GND
- 43 -
FSDATA[0..31]
FSDATA[0..31] 5
FSDATAU0
FSDATA0
RN11
1
8
FSDATAU1
33
2
7
FSDATA1
FSDATAU2
3
6
FSDATA2
FSDATAU3
FSDATA3
4
5
FSDATAU4
RN12
1
8
FSDATA4
FSDATAU5
33
2
7
FSDATA5
FSDATAU6
3
6
FSDATA6
FSDATAU7
FSDATA7
4
5
FSDATAU8
RN7
1
8
FSDATA8
FSDATAU9
33
2
7
FSDATA9
FSDATAU10
3
6
FSDATA10
FSDATAU11
4
5
FSDATA11
FSDATAU12
RN6
1
8
FSDATA12
FSDATAU13
FSDATA13
33
2
7
FSDATAU14
3
6
FSDATA14
FSDATAU15
4
5
FSDATA15
FSDATAU16
FSDATA16
RN13
1
8
FSDATAU17
33
2
7
FSDATA17
FSDATAU18
3
6
FSDATA18
FSBKSEL1 5
FSDATAU19
FSDATA19
4
5
FSDATAU20
RN9
1
8
FSDATA20
FSDATAU21
33
2
7
FSDATA21
FSBKSEL0 5
FSDATAU22
3
6
FSDATA22
FSDATAU23
4
5
FSDATA23
FSDATAU24
RN5
1
8
FSDATA24
FSDATAU25
33
2
7
FSDATA25
FSDATAU26
3
6
FSDATA26
FSDATAU27
4
5
FSDATA27
FSDATAU28
RN4
1
8
FSDATA28
FSDATAU29
FSDATA29
33
2
7
FSDATAU30
3
6
FSDATA30
FSDATAU31
4
5
FSDATA31
FSADDR[0..11]
5
FSADDRU6
RN3
1
8
FSADDR6
FSADDRU4
33
2
7
FSADDR4
FSADDRU5
FSADDR5
3
6
FSADDRU9
4
5
FSADDR9
FSBKSELU1
RN2
1
8
FSBKSEL1
FSBKSELU0
33
2
7
FSBKSEL0
FSADDRU7
3
6
FSADDR7
FSADDRU8
4
5
FSADDR8
FSADDRU0
R36
33/6
FSADDR0
FSADDRU1
R35
33/6
FSADDR1
FSADDRU11
RN8
1
8
FSADDR11
FSADDRU3
FSADDR3
33
2
7
FSADDRU10
3
6
FSADDR10
FSADDRU2
4
5
FSADDR2
FSCLK+
FSCLK+ 5
FSCLK-
FSCLK- 5
R34
33/6
FSDQS 5
FSDQM[0..3] 5
FSDQMU1
RN10
1
8
FSDQM1
Place Series termination resistors on all address and
/FSRASU
33
2
7
/FSRAS
/FSRAS 5
control lines (RN601,RN603,RN605) very close to U600
/FSCASU
3
6
/FSCAS
/FSCAS 5
FSCKEU
4
5
FSCKE
FSCKE 5
/FSWEU
RN1
1
8
/FSWE
Unloaded trace impedance on this interface is 90 Ohm
/FSWE 5
FSDQMU0
33
2
7
FSDQM0
Loaded trace impedace with DRAM load is 65 Ohm (for 2.5 inch total trace
FSDQMU3
FSDQM3
3
6
length)
FSDQMU2
4
5
FSDQM2
Place Series termination resistors on bidirectional lines-DATA and DQS
(RN600,RN602,RN604,RN606,R605) midway between U600 anf U700
Max trace length on this interfce is 2.5 inches
Minimize trace length difference between DQS and data and
among the data lines
TXA3+
TXA3-
TXAC+
R603, R604 very close to U600
TXAC-
FSCLK+, FSCLK- should be routed like a differentail pair
TXA2+
TXA2-
TXA1+
TXA1-
TXA0+
TXA0-
+12V_PANEL
GND
TXB3+
TXB3-
TXBC+
TXBC-
TXB2+
TXB2-
TXB1+
TXB1-
TXB0+
TXB0-
R48
0
+3.3V_DIG
R59
10K/6
MUTE
MUTE 8
+3.3V_DIG
JTAG_TRST
R52
2.7K
+3.3V_DIG
R63
10K/6
VGA_CAB
VGA_CAB 3
DVI_CAB
DVI_CAB 3
PPWR
+5V
PPWR 7
PBIAS
PBIAS 7
R82
2.7K
R84
0
OEXTR
R42
3.3K
U7
R81
2.7K
8
1
VCC
A0
7
2
WP
A1
GND
MSTR_SCL
6
3
SCK
A2
MSTR_SDA
5
4
SI
VSS
+3.3V_DIG
24LC32-SN
GND
SOIC8
I2C address: A2H and A3H
+5V
2
/RESET
OUT
/RESET
C76
C78
C80
0.1uF/6
0.1uF/6
0.1uF/6
U8
MAX809_1
GND
GND
CN2
TXA0-
1
2
TXA0+
1
2
TXA1-
3
4
TXA1+
3
4
TXA2-
5
6
TXA2+
5
6
7
8
7
8
TXAC-
9
10
TXAC+
+3.3V_LVDS
9
10
+3.3V_LVDS
TXA3-
11
12
TXA3+
TXB0-
11
12
TXB0+
13
14
13
14
15
16
15
16
TXB1-
17
18
TXB1+
17
18
R15
TXB2-
19
20
TXB2+
19
20
TXBC-
TXBC+
21
22
21
22
10K/6
TXB3-
23
24
TXB3+
23
24
25
26
25
26
LCDVCC
27
28
27
28
29
30
LCDVCC
29
30
LCDVCC
+12V_PANEL
R16
1841 30P
0/6/NS
GND
GND
GND
GND
R85
*0
GND
GND
PROJECT : L0T
Quanta Computer Inc.
Title
04. gm1601
Size
Document Number
Rev
L0T
2A
04. gm1601
Date:
Friday, July 11, 2003
Sheet
4
of
8