Acer AL2032W Manual de servicio - Página 36
Navegue en línea o descargue pdf Manual de servicio para Monitor Acer AL2032W. Acer AL2032W 39 páginas. Acer lcd monitor user's guide
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SCHEMATIC DIAGRAM
Main Board Circuit
+1.8V_CORE
V
5
/ 6
/ 6
/ 6
/ 6
/ 6
/ 6
/ 6
/ 6
/ 2
V
5
/ 6
F
F
F
/ 6
F
/ 6
F
F
F
F
F
/ 6
/ 2
u
u
/ 6
u
/ 6
u
u
u
u
u
u
F
F
. 1
. 1
. 1
. 1
7
. 1
. 1
F
. 1
6
. 1
8 2 2
F
7
u
0
1
F
5
u
F
6
F
3
5
4
3
3
u
5
4
5
u
4
0
4
. 1
0
0
u
0
0
. 1
u
0
3
0
u
. 1
0
0
1
1
1
1
1
. 1
5
1
1
C
7 2 2
1
5
8
. 1
4
9
. 1
2
0
0
4
0
5
C
1
C
C
3
0
C
1
3
C
C
2
0
1
C
C
0
C
1
1
1
C
C
C
C
C
C
GND
+2.5V_DDR
/ 6
/ 6
/ 6
/ 6
V
V
/ 6
5
5
/ 6
/ 6
F
/ 6
F
/ 6
/ 6
F
/ 6
/ 6
F
/ 2
/ 2
u
u
u
/ 6
/ 6
/ 6
u
F
F
F
F
9
. 1
F
0
. 1
F
F
. 1
u
. 1
F
u
F
u
u
8
F
F
F
2
F
2
u
2
u
u
. 1
u
u
. 1
u
3
. 1
0
. 1
0
. 1
2
0
u
u
0
u
4
0
4
. 1
1
1
1
9
. 1
0
6
. 1
1
7 2 2
5 2 2
5
2
3
7
. 1
6
. 1
4
0
8
. 1
C
2
0
0
2
0
1
0
1
0
3
4
1
2
0
1
C
1
C
0
1
C
2
2
C
1
1
1
1
0
0
0
1
1
1
C
C
C
C
C
C
C
C
C
C
C
C
GND
+3.3V_I/O_MALIBU
/ 6
/ 6
F
R170 0/6/NC
/ 6
/ 6
/ 6
/ 6
F
u
/ 6
/ 6
u
/ 6
/ 6
R171 0/6/NC
V
V
F
. 1
F
. 1
/ 6
F
F
F
F
5
5
u
u
F
F
4 0
u
u
u
u
3 0
/ 2
/ 2
u
. 1
. 1
. 1
u
F
3
. 1
. 1
. 1
. 1
. 1
7
3
6
5
F
4
7
u
0
7 0
5 0
0 0
6
F
6
. 1
1
1
1 0
8 0
1
u
5
u
0
6
0
2
4
1
1
1
1
6
2
2
7
0
C
C
5
5
C
C
C
1
1
1
1
1
2
2
C
C
1
C
C
C
C
C
C
GND
+1.8V_DVI
+3.3V_DVI
/ 6
/ 6
+3.3V_DVI
F
/ 6
/ 6
/ 6
/ 6
F
/ 6
V
/ 6
/ 6
u
u
. 1
F
F
5
F
F
1
F
3
. 1
F
F
u
u
u
/ 2
u
u
6
0
4
u
u
. 1
6
. 1
2
. 1
7
. 1
0
2
. 1
1
9
F
1
9
. 1
5
. 1
5
5
5
4
5
6
0
C
0
0
0
5
u
0
C
4
5
1
1
1
1
0
0
1
2
1
1
R131 0/6
C
C
C
C
C
C
2
C
C
TXD
GND
R132 0/6
GND
RXD
+3.3V_PLL
+3.3V_PLL
3
VGA_SCL
22pF/6
3
VGA_SDA
C67
C68
22pF/6
X1
14.318MHz
Route (VIN1/ADC_IN1, ADC1_RETURN) and
R77
(VIN2/ADC_IN2, ADC2_RETURN) as differential
tracks close to each other and ground the
GND
return track of each pair very close to the
Malibu D12 ball and ground pin
Optional Filter Caps in between a pair on LBADC differential tracks close
to the Malibu chip
R78
10K/6
GND
7
PWM0
7
PWM1
GND
CN3
+5V
1
TXD
2
RXD
3
4
T103
4606-04-04P-R/NS
GND
GND
MSTR_SCL
MSTR_SDA
6
/OCM_WE
6
/OCM_RE
6
/ROM_CS
T111
FSVREF
6
OCMADDR[0..19]
+1.8V_ADC
C38
C39
C62
C63
0.1uF/6
0.1uF/6
0.1uF/6
0.1uF/6
GND
+3.3V_ADC
GND
C171
C169
C70
C168
C175
22uF/25V
0.1uF/6
0.1uF/6
0.1uF/6
0.1uF/6
+3.3V_PLL
GND
C77
/ 6
/ 6
/ 6
/ 6
/ 6
/ 6
/ 6
F
F
F
F
u
F
F
u
F
u
u
u
4
. 1
u
u
5
. 1
22uF/25V
. 1
0
. 1
. 1
7
. 1
7
6
. 1
8
6
6
0
0
7
25V
7
1
7
7
0
1
0
6
0
0
0
1
1
1
1
1
C
C
C
C
C
C
C
GND
+3.3V_LVDSA
+3.3V_LVDS
6
OCMDATA[0..7]
C47
C44
C131
C132
C133
0.1uF/6
22uF/25V
0.1uF/6
0.1uF/6
0.1uF/6
25V
+3.3V_LVDSB
GND
GND
C144
C142
C148
C52
0.1uF/6
0.1uF/6
0.1uF/6
22uF/25V
25V
GND
+5V
+3.3V_ADC
R150
R151
10K/6
10K/6
/ 6
/ 6
/ 6
less R94 to CN6 pin 11
/ 6
/ 6
/ 6
K
/ 6
K
K
3
3
K
K
K
3
3
K
R101,R103 net swap
LED_G
R152
4K7/6
4 3
3
3
3
9 3
0 3
2
Q12
3
5 3
7 3
8 3
5
6 3
5
6
5
5
MMBT3904L
1
5
5
1
1
1
1
R
1
1
R
R
R
R
R
R
R161
1K/6
3
MENU
R153 4K7/6
R162
1K/6
LED_R
2
Q13
1
SEL
MMBT3904L
PWR
R163
1K/6
DOWN
R164
1K/6
UP
R165
1K/6
1
RIGHT
R166
1K/6
LEFT
R167
1K/6
R168
220R/6
R169
220R/6
/ 6
/ 6
/ 6
/ 6
/ 6
/ 6
/ 6
F
F
F
F
F
F
F
u
u
u
u
u
u
u
. 1
. 1
. 1
. 1
3
4
5
. 1
. 1
7
8
. 1
8
9
9
6
9
0
0
9
9
0
9
9
0
1
1
0
0
1
0
1
1
1
C
C
C
C
C
C
C
Junction from A
change to B
GND
All manuals and user guides at all-guides.com
+3.3V_LBADC
+3.3V_I/O_MALIBU
+2.5V_DDR
+1.8V_CORE
+3.3V_LVDSA
+3.3V_LVDSB
0
3
3
3
2
2
3
7
1
1
6
0
4
6
8
1
2
4
3
3
2
2
3
1
1
7
6
6
7
1
0
6
1
3
7
3
4
3
3
3
3
3
3
3
3
2
3
3
1
1
1
1
1
1
1
1
1
1
1
C
C
C
C
2
4
2
2
2
2
2
1
1
1
2
1
2
A
B
4
1
2
2
2
2
2
2
A
B
C
2
C
D
D
K
U
U
L
T
T
L
K
K
T
U
U
K
K
A
A
A
A
D
A
W
A
Y
C
H
J
M
P
L
T
V
R
Y
A
A
A
W
F
E
A
A
A
D
D
. 8
. 8
. 8
. 8
. 8
. 8
. 8
. 8
. 8
. 8
. 8
. 8
. 8
L
. 3
. 3
. 3
. 3
. 3
. 3
. 3
. 3
. 3
. 3
. 3
3
. 5
. 5
. 5
. 5
. 5
. 5
. 5
. 5
. 5
. 5
. 5
. 5
. 5
. 5
. 5
. 3
. 3
. 3
L
- 3
_ 1
_ 1
_ 1
_ 1
_ 1
_ 1
_ 1
_ 1
_ 1
_ 1
_ 1
_ 1
_ 1
_ 3
_ 3
_ 3
_ 3
_ 3
_ 3
_ 3
_ 3
_ 3
_ 3
_ 3
_ 2
_ 2
_ 2
_ 2
_ 2
_ 2
_ 2
_ 2
_ 2
_ 2
_ 2
_ 2
_ 2
_ 2
_ 2
_ 3
_ 3
_ 3
_ D
D
E
E
E
E
E
E
E
E
E
E
E
E
E
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
I O
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
B
B
B
8
C
R
R
R
R
R
R
R
R
R
R
R
R
R
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
S
S
S
1
A
O
O
O
O
O
O
O
O
O
O
O
O
O
A
B
D
D
D
N4
L
V
V
V
C
C
C
C
C
C
C
C
C
C
C
C
C
D
L
L
L
N3
DVI_SCL
D
V
A8
DVI_SDA
RX0+
RX0+
B8
RX0-
A9
RX0-
RX1+
B9
RX1+
RX1-
RX1-
A10
RX2+
B10
RX2+
RX2-
A6
RX2-
RXC+
RXC+
B6
RXC-
D5
RXC-
C5
NO_CONNECT
NO_CONNECT
B11
R54
249R/6 1%
REXT
B1
3
BLUE-
BLUE-
B2
3
BLUE+
C1
BLUE+
3
GREEN-
C2
GREEN-
GREEN+
3
GREEN+
D1
D2
RED-
3
RED-
3
RED+
C3
RED+
3
SOG
SOG
A1
N2
NO_CONNECT
N1
VGA_SCL
L4
VGA_SDA
3
AHS
L3
AHSYNC
R4
AVSYNC
3
AVS
EXTCLK
G4
XTAL
XTAL
G3
TCLK
TCLK
F1
K3
NO_CONNECT
NO_CONNECT
K2
3K3/6
ACS_RSET_HD
ACS_RSET_HD
C19
B19
VRED0
VRED1
A19
D18
VRED2
C18
VRED3
VRED4
B18
A18
VRED5
C17
VRED6
VRED7
A23
C22
VGRN0
VGRN1
B22
A22
VGRN2
D21
VGRN3
VGRN4
C21
B21
VGRN5
A21
VGRN6
VGRN7
B25
A25
VBLU0
VBLU1
D24
VBLU2
C24
B24
VBLU3
A24
VBLU4
VBLU5
C23
B23
VBLU6
VBLU7
A20
R37
B20
VCLK
10K/6
C20
VODD
D19
VVS
D20
VHS_CSYNC
VDV
B17
GND
VCLAMP
C26
PWM0
C25
PWM0
T105
PWM1
PWM1
D26
T106
PWM2
D25
OCM_TIMER1
A12
LBADC_IN3
B12
SCART_FUNC
C12
LBADC_IN2
SCART_RGB_CON
LBADC_IN1
GND
D12
LBADC_RETURN
C16
Y0
SVDATA0
B16
Y1
SVDATA1
A16
Y2
D15
SVDATA2
Y3
C15
SVDATA3
Y4
SVDATA4
B15
T101
Y5
A15
SVDATA5
Y6
D14
SVDATA6
Y7
SVDATA7
A17
T102
A14
SVDV
SVODD
B14
T104
SVVSYNC
C14
D16
SVHSYNC
LLC_VPC
SVCLK
M1
OCM_UDO
M2
OCM_UDI
K1
/RESET
/RESET
M4
IR1
IR1
M3
IR0
IR0
P4
MSTR_SCL
MSTR_SCL
MSTR_SDA
P3
MSTR_SDA
R3
/OCM_WE
R2
/OCM_WE
/OCM_RE
/OCM_RE
R1
T107
/OCM_CS
/ROM_CS
L1
T108
L2
/OCM_INT2
T109
/OCM_INT1
P2
T110
/OCM_CS2
P1
T4
/OCM_CS1
/OCM_CS0
OCMADDR19
T3
OCMADDR19
OCMADDR18
T2
OCMADDR18
OCMADDR17
T1
OCMADDR17
OCMADDR16
U4
OCMADDR16
OCMADDR15
U3
OCMADDR15
OCMADDR14
U2
OCMADDR14
OCMADDR13
U1
OCMADDR13
OCMADDR12
V4
OCMADDR12
OCMADDR11
V3
OCMADDR11
OCMADDR10
V2
OCMADDR10
OCMADDR9
V1
OCMADDR9
OCMADDR8
W3
OCMADDR8
OCMADDR7
W2
OCMADDR7
OCMADDR6
W1
OCMADDR6
Y3
OCMADDR5
OCMADDR5
Y2
OCMADDR4
Y1
OCMADDR4
OCMADDR3
OCMADDR3
OCMADDR2
AA3
OCMADDR2
OCMADDR1
AA2
OCMADDR1
OCMADDR0
AA1
OCMADDR0
AB3
KEY1
OCMDATA15
AB2
KEY2
OCMDATA14
AB1
KEY3
OCMDATA13
AC3
RIGHT
OCMDATA12
T112
AC2
LEFT
OCMDATA11
AC1
T113
OCMDATA10
AD1
T114
OCMDATA9
AE1
OCMDATA8
AF1
OCMDATA7
AD2
OCMDATA7
OCMDATA6
OCMDATA6
AE2
OCMDATA5
OCMDATA5
AF2
OCMDATA4
AD3
OCMDATA4
OCMDATA3
OCMDATA3
AE3
OCMDATA2
OCMDATA2
AF3
OCMDATA1
OCMDATA1
AD4
OCMDATA0
OCMDATA0
L
L
_ D
8
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
1
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
A
N
N
N
N
N
N
N
N
N
N
N
N
N
N
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
S
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
_ G
S
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
V
D
D
D
D
D
D
D
D
D
D
D
D
D
D
5
1
3
2
6
4
0
3
4
5
5
5
5
1
1
6
7
0
0
2
2
2
2
2
2
3
3
0
3
0
4
4
4
4
3
5
4
5
5
5
6
6
2
3
3
3
4
1
1
1
1
1
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
A
U
L
M
P
R
U
M
N
R
P
N
N
R
K
L
M
M
N
P
T
U
L
N
R
L
T
T
K
L
N
P
B
K
T
K
N
T
M
N
R
R
K
P
U
M
R
P
M
GND
CN5
10
9
8
7
6
5
4
3
2
1
4501-10-10P-R
TO BUTTON BOARD
2.0mm pitch
90° E&T
4607-11Pin
+1.8V_DVI
+3.3V_LVDS
+3.3V_DVI
+1.8V_ADC
+3.3V_PLL
FSVREF
+3.3V_ADC
U5
0
2
1
7
2
2
2
5
1
0
1
0
4
2
D
C
C
E
6
8
9
1
1
1
9
8
6
3
4
2
3
3
3
4
2
1
3
1
2
3
1
GM1601
A
A
A
A
J
W
D
D
D
D
C
C
C
C
C
A
A
A
B
D
E
F
F
G
H
H
J
J
416PBGA
. 3
. 3
. 3
S
F
F
. 8
. 8
. 8
. 8
. 3
. 3
. 3
. 3
. 3
. 8
. 8
. 3
. 3
. 3
. 3
L
L
L
S
S
S
S
E
E
L
L
L
_ 3
_ 3
_ 3
D
_ 1
_ 1
_ 1
_ 1
_ 3
_ 3
_ 3
_ 3
_ 3
_ 1
_ 1
_ 3
_ 3
_ 3
_ 3
D
D
D
D
P
_ P
P
V
R
R
D
D
D
D
I
I
I
I
I
I
I
I
I
_ F
E24
A
A
A
_ L
V
V
C
C
C
C
C
C
_ R
V
V
V
V
V
V
V
V
V
3
_ S
_ S
_ D
_ D
S
S
S
S
S
3
D
D
D
D
D
D
3
3
FSDATA0
E25
FSDATAU0
FSDATAU0
3
D
D
D
D
D
D
D
D
D
3
3
D
D
D
3
F
F
A
A
A
A
A
A
3
A
3
3
3
3
3
3
3
FSDATA1
E26
V
V
V
A
D
A
FSDATAU1
FSDATAU1
D
A
A
L
L
L
D
A
A
D
D
FSDATA2
G26
FSDATAU2
FSDATAU2
D
D
D
D
D
D
V
D
D
D
D
V
D
D
FSDATA3
G24
FSDATAU3
FSDATAU3
V
V
V
V
V
V
FSDATA4
H26
FSDATAU4
FSDATAU4
FSDATA5
H24
FSDATAU5
FSDATAU5
FSDATA6
J25
FSDATAU6
FSDATAU6
FSDATA7
T26
FSDATAU7
FSDATAU7
FSDATA8
R25
FSDATAU8
FSDATAU10
FSDATA9
P24
FSDATAU9
FSDATAU11
FSDATA10
P26
FSDATAU10
FSDATAU9
FSDATA11
N24
FSDATAU11
FSDATAU8
FSDATA12
N26
FSDATAU12
FSDATAU14
FSDATA13
M25
FSDATAU13
FSDATAU15
FSDATA14
L24
FSDATAU14
FSDATAU12
FSDATA15
L25
FSDATAU15
FSDATAU13
FSDATA16
M26
FSDATAU16
FSDATAU16
FSDATA17
M24
FSDATAU17
FSDATAU17
FSDATA18
N25
FSDATAU18
FSDATAU18
FSDATA19
N23
FSDATAU19
FSDATAU19
FSDATA20
P25
FSDATAU20
FSDATAU20
FSDATA21
R26
FSDATAU21
FSDATAU21
FSDATA22
R24
FSDATAU22
FSDATAU22
FSDATA23
K24
FSDATAU23
FSDATAU23
FSDATA24
J26
FSDATAU24
FSDATAU28
FSDATA25
H25
FSDATAU25
FSDATAU26
FSDATA26
G23
FSDATAU26
FSDATAU25
FSDATA27
G25
FSDATAU27
FSDATAU24
FSDATA28
F24
FSDATAU28
FSDATAU29
FSDATA29
F25
FSDATAU29
FSDATAU30
FSDATA30
F26
FSDATAU30
FSDATAU31
FSDATA31
FSDATAU31
FSDATAU27
AD25
FSADDR0
FSADDRU0
AD26
FSADDR1
AC24
FSADDRU1
FSADDR2
AC25
FSADDRU2
FSADDRU3
FSADDR3
AB26
FSADDR4
AA24
FSADDRU4
FSADDR5
AA25
FSADDRU5
FSADDRU6
FSADDR6
AA26
FSADDR7
Y24
FSADDRU7
FSADDR8
AB25
FSADDRU8
FSADDRU9
FSADDR9
AC26
FSADDR10
FSADDRU10
AB24
FSADDR11
FSADDRU11
U24
FSCLKp
FSCLKU+
U23
FSCLKn
FSCLKU-
L26
FSDQS
FSDQSU
R34
T25
FSDQM0
U25
FSDQMU0
FSDQM1
FSDQMU1
U26
FSDQM2
T24
FSDQMU2
/FSWEU
RN10
1
33
2
FSDQM3
V26
FSDQMU3
/FSRASU
FSWE
/FSWEU
/FSCASU
3
V25
FSCAS
V24
/FSCASU
FSCKEU
4
RN1
1
FSRAS
W26
/FSRASU
FSDQMU0
Y25
FSCKEU
FSDQMU3
33
2
FSCKE
3
FSBKSEL0
Y26
FSBKSELU0
FSDQMU1
4
FSBKSEL1
FSBKSELU1
FSDQMU2
AC18
GPIO_G06_B0
AD18
GPIO_G06_B1
AE18
GPIO_G06_B2
AF18
GPIO_G06_B3
AE19
TXA3+
A3+
AF19
A3-
TXA3-
AE20
AC+
TXAC+
AF20
TXAC-
AC-
AD21
GPIO_G05_B0
AD22
GPIO_G05_B3
AE21
A2+
TXA2+
AF21
TXA2-
A2-
AE22
A1+
TXA1+
AF22
A1-
TXA1-
AE23
TXA0+
A0+
AF23
R173
TXA0-
A0-
AD23
10K/6
MENU
GPIO_G04_B0
AD24
SEL
GPIO_G04_B1
AE24
PWR
GPIO_G04_B2
AF24
DOWN
GPIO_G04_B3
AF25
UP
GPIO_G04_B4
AF26
GPIO_G04_B5
LED_G
AE25
LED_R
GPIO_G04_B6
AE26
ADO_C 8
ADO_C
GPIO_G04_B7
AE8
nYCOEN
GPIO_G07_B0
AF8
nVDSW_SEL
GPIO_G07_B1
AC9
GPIO_G07_B2
nRESET
AD9
GPIO_G07_B3
AE9
GPIO_G07_B4
AF9
GPIO_G07_B5
CARD_RESET
AD10
GPIO_G07_B6
AE10
TUNER12V_KEY 7
TUNER12V_KEY
GPIO_G07_B7
AF10
LVDS_SHIELD[0]
AC11
LVDS_SHIELD[1]
AD11
LVDS_SHIELD[2]
AE11
LVDS_SHIELD[3]
AF11
TXB3+
B3+
AF12
TXB3-
B3-
AE12
TXBC+
BC+
AF13
TXBC-
BC-
AE13
LVDS_SHIELD[4]
AD14
LVDS_SHIELD[5]
AF14
TXB2+
B2+
AE14
B2-
TXB2-
AF15
TXB1+
B1+
AE15
TXB1-
B1-
AF16
B0+
TXB0+
AE16
TXB0-
B0-
AC7
T115
+3.3V_DIG
R48
0/6
DCLK
AF17
T116
GPIO_14/DHS
AD16
R59
10K/6
GPIO_15/DVS
AD7
MUTE
GPIO_16/DEN
+3.3V_DIG
R52
2K7/6
AD8
JTAG_TRST
GPIO_G08_B5/JTAG_RESET
AF7
GPIO_G08_B4/JTAG_TDO
AE7
GPIO_G08_B3
AF6
GPIO_G08_B2/JTAG_TDI
AE6
GPIO_G08_B1/JTAG_MODE
AD6
GPIO_G08_B0/JTAG_CLK
AF5
TT_I2CSDA
GPIO_G09_B5
AE5
TT_I2CSCL
GPIO_G09_B4
AD5
R63
GPIO_G09_B3
AC5
GPIO_G09_B2
AF4
GPIO_G09_B1
AE4
GPIO_G09_B0
A26
PPWR
PPWR
B26
PBIAS
PBIAS
AC17
NO_CONNECT
AC16
OEXTR
R42
3K3/6
OEXTR
AD15
D_GND
GND
GND
S
S
S
S
S
S
S
S
D
D
D
L
L
L
D
D
D
D
V
V
V
D
D
L
L
D
D
D
S
S
D
_ L
_ L
_ L
V
D
D
D
D
D
D
D
P
L
P
D
D
D
N
N
N
S
S
N
_ L
N
N
_ R
_ P
_ F
_ S
_ S
_ D
_ D
V
V
N
N
N
N
N
_ G
_ G
_ G
_ G
A
A
A
D
D
D
D
D
D
D
F
F
G
G
G
G
G
G
G
3
3
3
3
N
N
N
N
N
N
N
3
3
3
3
3
3
3
D
D
D
D
D
D
3
E
E
_ D
_ A
_ A
_ D
_ A
_ A
_ A
3
3
3
B
B
B
3
3
3
C
3
3
3
3
+5V
_ G
_ G
_ G
_ G
_ G
_ G
_ G
N
N
N
N
N
N
S
S
S
A
A
A
D
R
R
D
A
D
A
A
D
A
D
_ G
_ G
_ G
_ G
_ G
_ G
S
S
S
S
V
V
C
C
C
C
C
C
C
I
I
I
I
I
I
I
S
S
S
S
S
S
S
D
D
D
A
S
S
S
S
S
S
D
D
D
D
D
D
D
V
V
V
V
V
V
V
S
S
S
S
S
S
S
V
V
V
B
D
D
D
D
D
D
L
L
L
V
V
V
V
F
F
A
A
A
A
A
A
A
D
D
D
D
D
D
D
L
V
V
V
V
V
V
V
3
4
5
9
0
9
7
7
1
2
4
7
7
0
1
1
1
1
1
6
1
1
3
1
7
2
C76
C78
C80
1
1
1
1
C
C
C
C
C
D
D
2
4
4
2
5
1
4
4
7
7
7
7
1
1
5
1
3
2
4
2
4
4
2
M
P
R
P
L
A
A
A
A
A
A
A
K
W
B
D
E
A
E
C
E
A
B
C
D
A
D
D
F
G
H
H
J
J
K
B
0.1uF/6
0.1uF/6
0.1uF/6
GND
GND
- 36 -
Chapter 7
RX2-
RX1-
RX0-
RXC-
Y0
Y2
Y4
Y6
FSDATA[0..31]
LLC_VPC
FSDATA[0..31] 5
RN11
1
8
FSDATA0
SCART_FUNC
33
2
7
FSDATA1
SCART_RGB_CON
3
6
FSDATA2
nYCOEN
4
5
FSDATA3
nVDSW_SEL
8
RN12
1
FSDATA4
nRESET
33
2
7
FSDATA5
DVI DETECT
3
6
FSDATA6
CARD DETECT
5
RN7
4
1
8
FSDATA7
TVBOX_DETECT
33
2
7
FSDATA10
IR1
3
6
FSDATA11
4
5
V5IR
FSDATA9
FSDATA8
RN6
1
8
FSDATA14
33
2
7
V12
FSDATA15
3
6
FSDATA12
RN13
4
1
5
8
FSDATA13
33
2
7
FSDATA16
3
6
FSDATA17
4
5
FSDATA18
FSBKSEL1 5
RN9
1
8
FSDATA19
33
2
7
FSDATA20
3
6
FSDATA21
FSBKSEL0 5
4
5
FSDATA22
FSDATA23
RN5
1
8
FSDATA28
33
2
7
FSDATA26
3
6
FSDATA25
4
5
RN4
1
8
FSDATA24
33
2
7
FSDATA29
3
6
FSDATA30
4
5
FSDATA31
FSDATA27
FSADDR[0..11] 5
RN3
1
8
FSADDRU6
FSADDR6
2
7
FSADDRU5
33
FSADDR5
3
6
FSADDRU4
FSADDR4
4
5
FSADDRU9
FSADDR9
FSBKSELU1
RN2
1
8
FSBKSEL1
FSBKSELU0
33
2
7
FSBKSEL0
FSADDRU8
3
6
FSADDR8
FSADDRU7
4
5
FSADDR7
R36
33R/6
FSADDRU0
FSADDR0
R35
33R/6
FSADDRU1
FSADDR1
RN8
1
8
FSADDRU11
FSADDR11
2
7
FSADDRU10
33
FSADDR10
3
6
FSADDRU3
FSADDR3
4
5
FSADDRU2
FSADDR2
FSCLK+
FSCLK+ 5
FSCLK-
FSCLK- 5
33R/6
FSDQS 5
FSDQM[0..3] 5
Place Series term ination resistors on all address and
8
/FSWE
control lines (RN601,RN603,RN605) very close to U600
/FSWE 5
/FSRAS 5
7
/FSRAS
/FSCAS 5
6
/FSCAS
5
FSCKE
FSCKE 5
8
Unloaded trace im pedance on this interface is 90 Ohm
FSDQM0
7
FSDQM3
Loaded trace im pedace w ith DRAM load is 65 Ohm (for 2.5 inch total trace
6
FSDQM1
length)
5
FSDQM2
Place Series term ination resistors on bidirectional lines-DATA and DQS
(RN600,RN602,RN604,RN606,R605) m idw ay betw een U600 anf U700
Max trace length on this interfce is 2.5 inches
Minim ize trace length difference betw een DQS and data and
am ong the data lines
R603, R604 very close to U600
FSCLK+, FSCLK- should be routed like a differentail pair
+3.3V_DIG
+3.3V_DIG
+3.3V_DIG
R128
R33
10K/6
10K/6
R172
10K/6
DVI DETECT
CARD DETECT
TVBOX_DETECT
MUTE 8
+3.3V_LVDS
R15
10K/6/NC
R129
0/6/NC
+3.3V_DIG
R130
0/6/NC
+5V
+3.3V_DIG
10K/6
LCDVCC
R16
VGA_CAB
PANEL_VCC
VGA_CAB 3
0/6/NC
R174
T117
R175
0/6
0/6/NC
PPWR 7
GND
PBIAS 7
R82
2K7/6
R84
0/6
U7
8
1
R81
2K7/6
VCC
A0
7
2
WP
A1
6
3
MSTR_SCL
SCK
A2
5
4
MSTR_SDA
SI
VSS
R85
24LC32-SN
0/6/NC
+3.3V_DIG
GND
SOIC8
GND
I2C address: A2H and A3H
GND
3
C
C
1
/RESET
/RESET
V
OUT
D
N
G
U8
MAX809_0
2
GND
CN8
1
2
1
2
RX2+
3
4
3
4
RX1+
5
6
5
6
RX0+
7
8
7
8
RXC+
9
10
9
10
11
12
11
12
Y1
13
14
13
14
Y3
15
16
Y5
15
16
17
18
17
18
Y7
19
20
19
20
KEY1
21
22
KEY2
21
22
23
24
23
24
KEY3
26
25
MSTR_SCL
25
26
27
28
MSTR_SDA
27
28
29
30
29
30
TT_I2CSCL
31
32
31
32
TT_I2CSDA
33
34
CARD_RESET
33 34
35
36
35 36
ADO_L 8
38
37
37 38
ADO_R 8
39
40
39 40
41
42
41 42
43
44
43 44
1841 44P
GND
GND
AGND
CN2
1
2
TXA0-
TXA0+
1
2
3
4
TXA1-
TXA1+
3
4
TXA2-
5
6
TXA2+
5
6
7
8
+3.3V_LVDS
7
8
9
10
TXAC-
TXAC+
9
10
TXA3-
11
12
TXA3+
11
12
13
14
TXB0-
TXB0+
13
14
15
16
15
16
TXB1-
17
18
TXB1+
C
17
18
19
20
/ N
TXB2-
TXB2+
19
20
/ 6
21
22
4
TXBC-
TXBC+
21
22
1
K
TXB3-
23
24
TXB3+
0
R
23
24
1
25
26
25
26
27
28
LCDVCC
27
28
29
30
LCDVCC
29
30
3
1
R
1841 30P
C
/ N
GND
GND
/ 6
0
GND
PANEL_VCC
V
5
/ 6
/ 2
F
F
u
u
2 2 2
1
. 1
1
1
0
C
C
GND
PROJECT : M0TW
Quanta Computer Inc.
Title
04. gm1601
Size
Document Number
Rev
M0TW
A
04. gm1601
Date:
Tuesday , September 14, 2004
Sheet
4
of
8