Anda Telecom FE1 Manual del usuario - Página 10

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SW
BIT
DEFAULT
TITLE
CLOCK Settings (SW-1、SW-2)
SW-1 (close the power)
Internal clock (ON, ON): The clock generated by internal oscillator.
Line clock (OFF, ON):
External clock (ON,OFF): Recovery clock from receiving E1 signal.
Common PDH mode
NOTE:
1)
Guarantee that there is only one Internal clock device in one chain.
2)
Avoid that all device in one chain don't set as Line clock. But usually
FE1 Fiber Modem used as PDH, set it PDH mode.
LOOP Setting (SW-4, SW-5, SW-6)
BIT4, BIT5, BIT6 of SW (SW-4、 SW-5、 SW-6) are LOOP Setting, defined as
below:
SW
SW-4
SW-5
10-18
CLOCK
NC
1
2
OFF
OFF
OFF
SW-1
SW-2
SW-3
Table 5. Default settings of SW
ON
OFF
ON
OFF
Table 6. Clock settings
(OFF, OFF):
DEFINITION
Loop local data
back
ANA
Loop line back
DIG
LOOP
3
4
5
OFF
OFF
SW-4
SW-5
CLOCK SETTINGS
SW-2
ON
LINE clock (follow the opposite
ON
OFF
OFF
The clock recovered from receiving E1
signal, under this settings the device can
auto follow the opposite device Time slot
settings if the opposite device is Internal
clock.
Device used as a PDH, and can transmit
any E1 signal.
SPECIFICATION
OFF: Work normally
ON: Loop
OFF: Work normally
ON: Loop
PATT
FOLLOW
6
7
OFF
OFF
OFF
SW-6
SW-7
SW-8
Clock mode
INTERNAL clock
device Time Slot settings)
EXTERNAL clock
PDH mode (default)
DEFAULT
OFF
OFF
User Manual
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