DG FPGA Configurar - Página 2

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DG FPGA Configurar
dg_toeudp25gip_fpgasetup_xilinx.doc
Firstly, it uses one FPGA board and Test PC with 25Gb Ethernet card for transferring the data.
TestPC
runs
test
application,
i.e.,
tcpdatatest
(half-duplex
test
for
TOE25G-IP),
tcp_client_txrx_40G (full-duplex test for TOE25G-IP), or udpdatatest (application test for
UDP25G-IP). Also, Serial console/JTAG Terminal is run on Test PC to be user interface console.
Secondly, it uses two FPGA boards which may be different board. Both boards run
TOE25G-IP/UDP25G-IP demo with assigning the different initialization mode (Client, Server, or
Fixed-MAC) for transferring data.
7-Jun-21
Page 2