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NOTE:
MT/s indicates DIMM speed in MegaTransfers per second.
The system supports Flexible Memory Configuration, enabling the system to be configured and run in any valid chipset
architectural configuration. The following are the recommended guidelines for installing memory modules:
● All DIMMs must be DDR4.
● Mixing of memory module capacities in a system is not supported.
● If memory modules with different speeds are installed, they operate at the speed of the slowest installed memory module(s).
● Populate memory module sockets only if a processor is installed.
○ For single-processor systems, sockets A1 to A16 are available.
○ In Optimizer Mode, the DRAM controllers operate independently in the 64-bit mode and provide optimized memory
performance.
The following table describes the memory population information:
Processor
Single processor
● Populate all the sockets with white release tabs first, followed by the black release tabs.
● Unbalanced or odd memory configuration results in a performance loss and system may not identify the memory modules
being installed, so always populate memory channels identically with equal DIMMs for best performance.
● Minimum recommended configuration is to populate four equal memory modules per processor. AMD recommends limiting
processors in that system to 32 cores or less.
● Populate eight equal memory modules per processor (one DIMM per channel) at a time to maximize performance.
NOTE:
Equal memory modules refer to DIMMs with identical electrical specification and capacity that may be from
different vendors.
Memory interleaving with Non-uniform memory access (NUMA)
Non-uniform memory access (NUMA) is a memory design used in multi-processing, where the memory access time depends on
the memory location relative to the processor. In NUMA, a processor can access its own local memory faster than the non-local
memory.
NUMA nodes per socket (NPS)
NUMA nodes per socket (NPS) is a new feature added that allows you to configure the memory NUMA domains per socket. The
configuration can consist of one whole domain (NPS1), two domains (NPS2), or four domains (NPS4). NPS2 and NPS4 are not
recommended for VxRail.
In the processors, each physical processor package contains multiple processor cores that are grouped together into core
complexes and core complex dies. A core complex (CCX) consists of maximum four processor cores and an L3 cache memory. A
core complex die (CCD) contains two CCXs. The physical processor package contains maximum eight core CCDs. A max CCD x
CCX x Core processor will have 64 cores. The BIOS setup allows for the selection of an NPS profile based on down core profile
and by processor SKU.
The following table shows the available NPS profiles for each combination of CCDs, CCXs, and number of cores in the CCX:
Cores
64
48
32
24
16
16
8
8
20
Replacing and adding hardware
Configuration
Optimizer (Independent channel)
population order
CCDs x CCXs x Cores/CCX
8x2x4
6x2x4
4x2x4
3x2x4
2x2x4
4x2x2
4x2x1
2x2x2
Memory population
A{1}, A{2}, A{3}, A{4}, A{5}, A{6},
A{7}, A{8}, A{9}, A{10}, A{11},
A{12}, A{13}, A{14}, A{15}, A{16}
NPSx options - Single processor
1
1
1
1
1
1
1
1
Memory
population
information
Odd amount
of DIMMs per
processor allowed.