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Sony ZS-Y3 - Personal Cd Audio System Manual de servicio
ZS-Y3
• IC Pin Function Description
MAIN BOARD IC802 MB89498PF-G-102-BNDE1 (SYSTEM CONTROLLER)
Pin No.
Pin Name
1
VCC
2 to 4
SIMUKE1 to SIMUKE3
5
TEST-A
6
BATT-CHK
7 to 10
NC
11
CD-DOOR
12
AC-CHK
13 to 15
NC
16
3.3V-MONITOR
17
CD-WRQ
18
NC
19
RMC-IN
20, 21
NC
22
CD-RES
23
CD-CE
24
CD-DRF
25
CD-FSEQ
26
CD-DIN
27
CD-DOUT
28
CD-CLK
29
AVR
30
AVCC
31
AGND
32 to 34
KEY1 to KEY3
35, 36
NC
37
BTT-CHK-H
38
BTT-CHK-M
39
V-CHECK
40 to 42
NC
43
V-CLK
44
V-DATA
45
NC
46
SCL
47
SDA
48
X1A
49
X0A
50
VSS
51
VDD
52 to 54
V3 to V1
55 to 58
COM0 to COM3
59 to 75
S0 to S16
76 to 78
NC
79
PL-CONT
80
BACK-LIGHT
81
M-BASS
82
P-CON
32
I/O
—
Power supply terminal (+3.3V)
I
Destination setting terminal
I
Test mode setting terminal Normally fixed at "H"
—
Not used
—
Not used
I
CD lid open/close detection switch input terminal "L": CD lid is close
I
AC voltage detection signal input terminal "L": AC detected
—
Not used
I
CD voltage (+3.3V) detection signal input terminal
I
Interruption detection signal input from the digital signal processor
—
Not used
I
Remote control signal input terminal
—
Not used
O
System reset signal output to the digital signal processor "L": reset
O
Chip enable signal output to the digital signal processor
I
Focus on/off detection signal input from the digital signal processor
I
Synchronizing signal detection signal input from the digital signal processor
O
Serial data output to the digital signal processor
I
Serial data input from the digital signal processor
O
Serial data transfer clock signal output to the digital signal processor
—
Not used
—
Power supply terminal (+3.3V)
—
Ground terminal
I
Key input terminal (A/D input)
—
Not used
I
Battery high voltage detection input terminal
I
Battery middle voltage detection input terminal Not used
O
Power supply voltage detection signal input terminal for the electrical volume
—
Not used
O
Serial data transfer clock signal output to the electrical volume
O
Serial data output to the electrical volume
—
Not used
O
Serial clock signal output terminal to the EEPROM
I/O
Two-way serial data bus with the EEPROM
O
Sub system clock output terminal (75 kHz)
I
Sub system clock input terminal (75 kHz)
—
Ground terminal
—
Power supply terminal (+3.3V)
Terminal for doubler circuit capacitor connection to develop liquid crystal display drive
—
voltage
O
Common drive signal output to the liquid crystal display
O
Segment drive signal output to the liquid crystal display
—
Not used
O
Trigger plunger drive signal output "H": plunger on
O
LCD back light on/off control signal output terminal "H": LED ON
O
MEGA BASS on/off control signal output terminal "H": active
O
Power control signal output terminal "H": active
Description