Motorola CP040 Información de servicio - Página 10

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1-6

3.2.6

Sensing of Externally-Connected Accessories

Port PJ1 is used to detect the presence of externally connected accessories. Port PJ1 (U401 pin

72) is normally low, unless accessories (lapel speaker microphone, lightweight headset, etc.) are

used with the radio. This port is used to detect an accessory PTT or auto sensing of a VOX

accessory.

If VOX is programmed into the radio channel codeplug information, and PJ1 is high during power-

up, the radio will activate VOX operation. If a low is present at port PJ1 during power-up, the radio

will use this port as an external PTT indicator.

3.2.7

Microprocessor Power-Up, Power-Down and Reset Routine

On power-up, the microprocessor is held in reset until the digital 3.3V regulator (U320 pin 5)

provides a stable supply voltage. Once the digital supply reaches steady state and releases the

reset line (U320 pin 7), the microprocessor begins to start up. The ASFIC_CMP (U451) has already

started running and is providing the startup clock to the microprocessor. After reset release by all

circuits, the software within the microprocessor begins executing port assignments, RAM checking,

and initialization. A fixed delay of 100 ms is added to allow the audio circuitry to settle. Next, an alert

beep is generated and the steady state software begins to execute (buttons are read, radio circuits

are controlled).

When the radio is turned off, SWB+ is removed and port PE0 (U401 pin 67) goes low, initiating a

power-down routine. Port PH3 (pin 44) remains high, keeping the voltage regulators on via Q493

and Q494, until the operating state of the radio has been stored in EEPROM. PH3 then goes low,

and all regulated voltages are removed.

The microprocessor reset line (pin 94) can be controlled directly by the digital 3.3 V regulator (U320

pin 7), the microphone jack (part of accessory connector J471) via Q472 and Q471, and the

microprocessor itself. U320 pulls the reset line low if the digital 3.3 V source loses regulation. This

prevents possible MOS latch-up or overwriting of registers in the microprocessor because the reset

line is higher in voltage than the microprocessor VDD ports (U401 pins 12, 39, 59, 88). The

microprocessor can drive the reset line low if it detects a fault condition such as an expired

watchdog timer, software attempting to execute an infinite loop, unplanned hardware inputs, static

discharge, etc. Finally, the Q471 can pull the reset line low during use of the programming cable and

CPS by the application of a sufficiently negative voltage to the microphone connector tip contact

(J471 pin 4), however this reset method is not utilized.

3.2.8

Boot Mode Control

When power-up reset occurs, the microprocessor will boot into either normal or flash mode

depending on the logic level of ports MODA (U401 pin 58) and MODB (pin 57). The Flash Adapter is

a programming accessory which provides negative 9 volts dc via a 1K resistor to microphone

connector J471 pin 4. This turns on Q471 and Q472 via D471 and VR472, pulling MODA and

MODB low and allowing booting in the flash mode by cycling power to reset the radio. Software

upgrades can then performed by loading the new software code into Flash ROM U404.

THEORY OF OPERATION