Motorola GM660 Información de servicio - Página 20
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5.2
Pre-Driver Stage
The next stage is an LDMOS device (Q3421) providing a gain of 13 dB. This device requires a
positive gate bias and a quiescent current flow for proper operation. The voltage of the line
PCIC_MOSBIAS_1 is set during transmit mode by the PCIC pin 24, and fed to the gate of Q3421
via the resistive network R3410, R3415, and R3416. The bias voltage is tuned in the factory.
5.3
Driver Stage
The following stage is an enhancement-mode N-Channel MOSFET device (Q3431) providing a gain
of 10dB. This device also requires a positive gate bias and a quiescent current flow for proper
operation. The voltage of the line MOSBIAS_2 is set in transmit mode by the ASFIC and fed to the
gate of Q3431 via the resistive network R3404, R3406, and R3431-5. This bias voltage is also tuned
in the factory. If the transistor is replaced, the bias voltage must be tuned using the Customer
Programming Software (CPS). Care must be taken not to damage the device by exceeding the
maximum allowed bias voltage. The device's drain current is drawn directly from the radio's DC supply
voltage input, PASUPVLTG, via L3431 and L3432.
5.4
Final Stage
The final stage uses the bipolar device Q3441. The device's collector current is also drawn from the
radio's DC supply voltage input. To maintain class C operation, the base is DC-grounded by a series
inductor (L3441) and a bead (L3442). A matching network consisting of C3446-52, C3467, L3444-5,
and two striplines, transforms the impedance to approximately 50 ohms and feeds the directional
coupler.
5.5
Directional Coupler
The directional coupler is a microstrip printed circuit, which couples a small amount of the forward
and reflected power delivered by Q3441. The coupled signals are rectified by D3451-2 and
combined by R3463-4. The resulting DC voltage is proportional to RF output power and feeds the
RFIN port of the PCIC (U3501 pin 1). The PCIC controls the gain of stage U3401 as necessary to
hold this voltage constant, thus ensuring the forward power out of the radio to be held to a constant
value.
An abnormally high reflected power level, such as may be caused by a damaged antenna, also
causes the DC voltage applied to the PCIC to increase, and this will cause a reduction in the gain of
U3401, reducing transmitter output power to prevent damage to the final device due to an improper
load.
THEORY OF OPERATION