Motorola GP340 ATEX Información de servicio - Página 14

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Motorola GP340 ATEX Información de servicio
2-6
4.1

Synthesizer

(Refer to Figure 2-4 and the Synthesizer schematic diagram)
The Fractional-N synthesizer, shown in Figure 2-4, uses a 17.0 MHz crystal (Y201) to provide a
reference for the system. Along with being used in the LVFracN, the 17.0 MHz signal is provided at
pin 19 of U205 for use by the ASFIC and LVZIF.
The LVFractN IC (U205) further divides this by 8 internally to give 2.125 MHz to be used as the
reference frequency in the frequency synthesis. While UHF and VHF can use other references,
(divide by 7 or divide by 7/8), only the divide by 8 function is valid for lowband.
The internal oscillator device in the LVFracN together with C236, C237, C242, R219, CR211 and
Y201 comprise the reference oscillator. This oscillator is temperature compensated is capable of 2.5
ppm stability over temperatures of -30 to 85°C. There is temperature compensation information that
is unique to each crystal contained on Y201 that is programmed into the radio when built.
The loop filter consists of components C256, C257, C259, R224, R225 and R228. This circuit
provides the necessary dc steering voltage for the VCO and determines the amount of noise and
spur passing through.
To achieve fast locking for the synthesizer, an internal adapt charge pump provides higher current at
pin 45 of U205 to put the synthesizer within lock range. The required frequency is then locked by
normal mode charge pump at pin 43.
Both the normal and adapt charge pumps get their supply from the inductive voltage multiplier made
up of C247, C249, C283-C286, D210, D211, R285 and R286.
This circuit provides 13.3V at U205, pin 47.
DATA (U409 PIN 100)
CLOCK (U409 PIN 1)
CSX (U409 PIN 2)
MOD IN (U404 PIN 40)
+5V (U204 PIN 4)
5, 20, 34, 36
(U400 PIN 1)
REFERENCE
OSCILLATOR
VOLTAGE
MULTIPLIER
7
DATA
8
CLK
9
CEX
U205
LOW VOLTAGE
10
MODIN
FRACTIONAL-N
13, 30
SYNTHESIZER
V
, DC5V
CC
V
, 3.3V
DD
23
XTAL1
24
XTAL2
25
WARP
32
PREIN
47
VCP
INDMULT
16
PRESCALER IN
Figure 2-4 Lowband Synthesizer Block Diagram.
4
LOCK
19
FREFOUT
6, 17, 22, 29, 31, 33, 44
GND
43
IOUT
45
IADAPT
41
MODOUT
1
AUX2
SWITCHING
NETWORK
2
AUX3
FILTERED 4.3V
28
SFOUT
BIAS1
40
BIAS2
39
THEORY OF OPERATION
LOCK (U409 PIN 56)
FREF (U303 PIN 21 & U404 PIN 34)
STEERING
LINE
2-POLE
LOOP
FILTER
LO RF INJECTION
VOLTAGE
CONTROLLED
OSCILLATORS
TX RF INJECTION
(FIRST STAGE OF PA)