Yamaha RX-V657 - AV Receiver Manual de servicio - Página 38

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Yamaha RX-V657 - AV Receiver Manual de servicio
A
B
C
SCHEMATIC DIAGRAM (DSP 1/2)
1
REGULATOR
3.5
4.8
2
3.5
1.3
0
0
0
3.4
0.1
3.4
0
0.1
4.8
4.9
4.8
4.8
0.1
3
0
0.2
0
4.8
4
0.2
0
4.8
0.2
0
4.8
BUFFER
5
4.8
2.2
2.7
0.6
0
2.2
1.8
0.6
0
4.8
0.1
6
7
8
9
IC13 : PQ012FZ01ZP
Rgulator
10
DC INPUT (VIN)
1
D
E
F
RX-V757/DSP-AX757/DSP-AX757SE/RX-V657 Page 88
K-2
TO OPERATION (5) W881
HTR-5860 Page 89
L-2
TO OPERATION (4) W881
0.1
3.4
0.1
3.5
0
0.1
0.2
0.1
DIR
0.2
0.1
0
0
3.5
3.5
0.2
1.6
0.1
0.6
1.7
0.6
1.8
1
3.5
3.5
0
0
0.1
1.3
0
3.4
3.4
3.4
0
1.3
0
1.3
0
0
1.8
1.8
1.3
0
1.8
3.4
0
1.3
0
3.5
3.1
3.4
0
1.3
0.5
0
1.3
3.4
3.4
1.3
3.4
0
1.3
3.4
0
0
1.3
1.3
0
IC12 : SN74AHC1G08DCKR
Single 2 Input AND
IC3 : SN74AHCT00PWR
IN B
1
5
VDD
Quad 2 Input NAND
IN A
2
A1
1
14
V
DD
VSS
3
4
OUT X
B1
2
13
B4
Y1
3
12
A4
IC26 : SN74AHCT1G32DCKR
3
DC OUTPUT (VO)
Single 2 Input OR
A2
4
11
Y4
I C
B2
5
10
B3
1
A
5
VCC
2
ON/OFF CONTROL (VC)
Y2
6
9
A3
B
2
5
V
SS
7
8
Y3
GND
3
4
Y
GND
G
H
J, R, T, K, A, B, G, E, L
U, C
X: NOT USED
SELECTOR
0.2
1.8
0
1.8
1.3
0.1
1.4
FL/FR
1.3
0
1.4
0.8
0.1
PL/PR
0.1
C/SW
0.1
0
SL/SR
3.4
SBL/SBR
1.8
1.8
3.4
DECODER
DSP
3.5
0
1.3
3.2
3.2
3.2
3.2
3.3
3.3
3.4
0
1.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
1.3
0
3.4
3.3
3.2
3.3
3.4
3.4
3.4
0
1.3
IC1 : SN74LVU04APWR
IC22 : SN74AHCT08PWR
IC7 : SN74LV157APWR
Hex Inverters
Quad 2 Input AND
2 to 1 Data Selectors
INPUTS
OUTPUT
INPUTS
OUTPUT
1A
1
14
V
A1
1
14
V
DD
DD
V
CC
STROBE
4A
4B
4Y
3A
3B
1Y
2
13
6A
B1
2
13
B4
16
15
14
13
12
11
10
2A
3
12
6Y
Y1
3
12
A4
G
4A
4B
4Y
3A
3B
2Y
4
11
5A
A2
4
11
Y4
S
3Y
3A
5
10
5Y
B2
5
10
B3
1A
1B
1Y
2A
2B
2Y
3Y
6
9
4A
Y2
6
9
A3
1
2
3
4
5
6
7
SELECT
1A
1B
1Y
2A
2B
2Y
7
V
SS
8
4Y
V
SS
7
8
Y3
INPUTS
OUTPUT
INPUTS
OUTPUT
I
J
K
RX-V757/DSP-AX757/DSP-AX757SE/RX-V657 Page 92
I-8
TO SUBTRANS (2) CB457
HTR-5860 Page 93
J-8
TO SUBTRANS (2) CB457
A/D IN
DIGITAL IN
16M
SRAM
4M ROM
3.4
0
3.2
3.2
0.1
3.2
3.3
0.1
0
0
0.1
3.2
3.3
0.1
3.2
3.3
0.1
3.4
3.4
0.1
3.3
3.3
0.1
3.3
3.3
0
0
0
3.3
3.3
3.3
3.3
3.4
3.4
3.4
3.4
3.4
3.4
3.4
3.4
1.8
3.4
3.4
0.1
3.4
0.1
0.1
0.1
~
0.1
0
~
0.4
~
2.6
0.4
~
2.9
3.1
2.6
3.1
3.1
2.9
3.1
3.4
0
0.4
IC10 : SN74LV245APWR
Octal 3-State Bus Transceivers
Point q (Pin 28 of IC2)
DIR
1
20 V
CC
A1
19 ENG
2
A2
3
18 B1
A3
4
17 B2
3Y
9
A4
5
16 B3
A5
6
15 B4
INPUTS
A6
7
14 B5
OUTPUT
SELECT STROBE
Y
G
A7
8
13 B6
X
H
L
L
L
A
H
L
B
A8
9
12 B7
8
GND
GND
10
11 B8
L
M
N
RX-V757/DSP-AX757/DSP-AX757SE
RX-V657/HTR-5860
IC6 : W9816G6CH-7
512K x 2 Banks x 16 Bits SDRAM
CLK 35
CLOCK
BUFFER
CKE 34
CONTROL
COLUMN DECODER
CS
18
SIGNAL
R
RAS
17
GENERATOR
O
COMMAND
W
CAS
16
DECODER
D
CELL ARRAY
2 DQ0
E
WE
15
BANK #0
C
3 DQ1
O
D
E
5 DQ2
R
A10 20
6 DQ3
SENSE AMPLIFIER
8 DQ4
9 DQ5
MODE
A0
21
11 DQ6
REGISTER
12 DQ7
A3
24
ADDRESS
REFRESH
DQ
BUFFER
COUNTER
BUFFER
39 DQ8
A4
27
40 DQ9
A9
32
42 DQ10
BA
19
43 DQ11
45 DQ12
46 DQ13
REFRESH
COLUMN
COLUMN DECODER
48 DQ14
COUNTER
COUNTER
R
O
49 DQ15
W
D
CELL ARRAY
E
BANK #1
C
O
D
E
R
14 LDQM
36 UDQM
SENSE AMPLIFIER
IC8 : MBM29LV400BC-70PFT
4M Bit Flash Memory
0.2
DQ0~DQ15
3.4
VCC
RY/BY
0
RY/BY
BUFFER
VSS
ERASE CIRCUIT
I/O BUFFER
3.3
WE
3.3
BYTE
3.3
RESET
CONTROL
3.3
CIRCUIT
(COMMAND REGISTER)
3.3
WRITE CIRCUIT
3.3
STB
3.3
CHIP ENABLE
DATA LATCH
CE
OUTPUT ENABLE
3.4
OE
CIRCUIT
3.3
3.2
3.3
3.2
Y DECODER
Y GATE
3.3
STB
3.2
3.3
WRITE/ERASE
LOW VCC DETECT
PULSE TIMER
4,194,304
3.2
X DECODER
CELL
A0~A17
MATRIX
3.4
0
A-1
3.4
0.4
* All voltages are measured with a 10M Ω /V DC electronic volt meter.
* Components having special characteristics are marked Z and
must be replaced with parts having specifications equal to
those originally installed.
* Schematic diagram is subject to change without notice.
* 電圧は、内部抵抗10MΩの電圧計で測定したものです。
* Z印のある部品は、安全性確保部品を示しています。部品の交換が必要な場合、
パーツリストに記載されている部品を使用してください。
* 本回路図は、標準回路図です。改良のため予告なく変更することがございます。
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