Cypress Semiconductor CY25822-2 Hoja de especificaciones

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Features
• 3.3V operation
• 48- and 66-MHz frequency support
• Selectable slew rate control
• 350-pS jitter
2
• I
C programmability
• 500- A power-down current
• Spread Spectrum for best electromagnetic interference
(EMI) reduction
• 8-pin SOIC package
Block Diagram
Clock Input
Freq.
Divider
M
SDATA
Logic
SCLOCK
Control
PWRDWN#
Pin Configuration
Cypress Semiconductor Corporation
Document #: 38-07531 Rev. **
CK-SSC Spread Spectrum Clock Generator
VDD
Phase
Charge
Detector
Pump
Modulating
Waveform
Feedback
Divider
N
GND
C L K IN
1
2
V D D
C Y 2 5 8 2 2 -2
3
G N D
C L K O U T
4
* 1 5 0 K
P u ll-u p
•
3901 North First Street
Post
VCO
Dividers
PLL
8
*P W R D W N #
7
S C L O C K
S D A T A
6
5
R E F O U T
,
•
San Jose
CA 95134
CY25822-2
REFOUT
CLKOUT
(SSCG Output)
•
408-943-2600
Revised March 18, 2003
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