Cypress Semiconductor CY7C1012DV33 Hoja de especificaciones - Página 6

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Data Retention Characteristics
Over the Operating Range
Parameter
Description
V
V
for Data Retention
DR
CC
I
Data Retention Current
CCDR
[11]
t
Chip Deselect to Data Retention
CDR
Time
[12]
t
Operation Recovery Time
R
Data Retention Waveform
V
CC
CE

Switching Waveforms

ADDRESS
DATA OUT
PREVIOUS DATA VALID
ADDRESS
CE
OE
DATA OUT
V
CC
SUPPLY
CURRENT
Notes
11. Tested initially and after any design or process changes that may affect these parameters.
12. Full device operation requires linear V
13. Device is continuously selected. OE, CE = V
14. WE is HIGH for read cycle.
15. Address valid before or similar to CE transition LOW.
Document Number: 38-05610 Rev. *D
V
= 2V, CE > V
CC
V
> V
– 0.2V or V
IN
CC
3.0V
t
CDR
Figure 3. Read Cycle No. 1
t
AA
t
OHA
Figure 4. Read Cycle No. 2 (OE Controlled)
t
ACE
t
DOE
t
LZOE
HIGH IMPEDANCE
t
LZCE
t
PU
50%
> 50 μs or stable at V
ramp from V
to V
CC
DR
CC(min)
.
IL
[3]
Conditions
– 0.2V,
CC
< 0.2V
IN
DATA RETENTION MODE
>
V
2V
DR
[13, 14]
t
RC
RC
[3, 14, 15]
t
RC
DATA VALID
> 50 μs.
CC(min)
CY7C1012DV33
Min
Typ
Max
2
25
0
t
RC
3.0V
t
R
DATA VALID
t
HZOE
t
HZCE
HIGH
IMPEDANCE
t
PD
50%
Page 6 of 11
Unit
V
mA
ns
ns
I
CC
I
SB
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