Cypress Semiconductor CY7C1019BN Hoja de especificaciones - Página 3

Navegue en línea o descargue pdf Hoja de especificaciones para Hardware informático Cypress Semiconductor CY7C1019BN. Cypress Semiconductor CY7C1019BN 8 páginas. 128k x 8 static ram

AC Test Loads and Waveforms
R1 480Ω
5V
OUTPUT
30 pF
INCLUDING
JIG AND
SCOPE
(a)
Equivalent to: THÉVENIN EQUIVALENT
167Ω
OUTPUT
Switching Characteristics
Parameter
Read Cycle
t
Read Cycle Time
RC
t
Address to Data Valid
AA
t
Data Hold from Address Change
OHA
t
CE LOW to Data Valid
ACE
t
OE LOW to Data Valid
DOE
t
OE LOW to Low Z
LZOE
t
OE HIGH to High Z
HZOE
t
CE LOW to Low Z
LZCE
t
CE HIGH to High Z
HZCE
t
CE LOW to Power-Up
PU
t
CE HIGH to Power-Down
PD
[7, 8]
Write Cycle
t
Write Cycle Time
WC
t
CE LOW to Write End
SCE
t
Address Set-Up to Write End
AW
t
Address Hold from Write End
HA
t
Address Set-Up to Write Start
SA
t
WE Pulse Width
PWE
t
Data Set-Up to Write End
SD
t
Data Hold from Write End
HD
t
WE HIGH to Low Z
LZWE
t
WE LOW to High Z
HZWE
Notes:
4. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
I
/I
and 30-pF load capacitance.
OL
OH
are specified with a load capacitance of 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
5. t
, t
, and t
HZOE
HZCE
HZWE
6. At any given temperature and voltage condition, t
7. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. CE and WE must be LOW to initiate a write, and the transition of any
of these signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the write.
8. The minimum write cycle time for Write Cycle no. 3 (WE controlled, OE LOW) is the sum of t
Document #: 001-06425 Rev. **
R1 480Ω
5V
OUTPUT
R2
5 pF
255Ω
INCLUDING
JIG AND
SCOPE
(b)
1.73V
[4]
Over the Operating Range
Description
[5, 6]
[6]
[5, 6]
[6]
[5, 6]
is less than t
, t
HZCE
LZCE
3.0V
R2
GND
255Ω
≤ 3 ns
-12
Min.
Max.
12
12
3
12
6
0
6
3
6
0
12
12
9
8
0
0
8
6
0
3
6
is less than t
, and t
is less than t
HZOE
LZOE
HZWE
and t
.
HZWE
SD
CY7C1019BN
ALL INPUT PULSES
90%
90%
10%
-15
Min.
Max.
Unit
15
ns
15
ns
3
ns
15
ns
7
ns
0
ns
7
ns
3
ns
7
ns
0
ns
15
ns
15
ns
10
ns
10
ns
0
ns
0
ns
10
ns
8
ns
0
ns
3
ns
7
ns
for any given device.
LZWE
Page 3 of 8
10%
≤ 3 ns
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