Cypress Semiconductor CY7C1297H Hoja de especificaciones - Página 13

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Timing Diagrams
(continued)
[20, 21]
ZZ Mode Timing
CLK
ZZ
I
SUPPLY
ALL INPUTS
(except ZZ)
Outputs (Q)
Notes:
20. Device must be deselected when entering ZZ mode. See Cycle Descriptions table for all possible signal conditions to deselect the device.
21. DQs are in High-Z when exiting ZZ sleep mode.
Document #: 38-05669 Rev. *B
t ZZ
t
ZZI
I
DDZZ
High-Z
DON'T CARE
CY7C1297H
t ZZREC
t RZZI
DESELECT or READ Only
Page 13 of 15
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