EG&G ORTEC 426 Manual de funcionamiento y servicio - Página 6
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Imprimir páginaORTEC 426 LINEAR GATE
1. DESCRIPTION
The ORTEC 426 is a modular Linear Gate that provides a
variable gate duration whose width is controlled by a single-
turn front-panel-mounted potentiometer. The nominal gate
duration range is from 0.3 to 4 fisec. Operation of the Linear
Gate is controlled by the application of a positive Enable
pulse. The Linear Gate is useful in applications that require
inhibiting a linear signal according to chosen coincidence or
timing requirements, e.g., reducing the counting rate in sub
sequent l inear analysis equipment.
The 426 is designed to meet the recommended interchange-
ability standards of USAEC Report TID-20893 (Rev.). An
ORTEC 401/402 Series Bin and Power Supply provides all
necessary power through the rear module power connector.
All signal levels and impedances are compatible with other
modules in the ORTEC 400 Series.
The basic function of the 426 is to accept al l pulse shapes
existing in the ORTEC 400 Series l inear function modules.
If the input signal is bipolar, the negative portion wi l l not be
passed through the Linear Gate. The input impedance is
greater than 5000^2, and the input is normally sent from the
factory ac-coupled. The input can be operated dc-coupled
if desired (refer to Section 4.4). A dc-restoration network at
the input reduces baseline shift at high counting rates. The
restoration network works on both unipolar and bipolar in
put pulse shapes. The Linear Gate proper consists of a series-
parallel saturated transistor switch. This switch network
incorporates an adjustment that allows the Linear Gate to
operate with no pedestal. The series-parallel transistor switch
is activated by a transistor-pair current switch. This latter
switch is activated by ,the gate control pulse which is
generated with the application of an externally generated
Enable pulse. The output of the Linear Gate circuit is fed
into a cascode emitter-follower cable driver.
The ORTEC 426 has two operating modes: normally blocks
all input signals not accompanied by an Enable pulse and
normally passes all signals unless accompanied by an Inhibit
signal. The Inhibit signal can be fed into the front panel
Enable connector for Pulse Inhibit operation or into the DC
Inhibit Input connector for dc or continuous inhibit opera
tion.
2. SPECIFICATIONS
2.1. PERFORMANCE
Gain Unity.
Integral Nonlinearity <0.15% from 0.2 to 10 V.
Pulse Feedthrough <10 mV with a lO-V input pulse.
Temperature Stability <0.015%/°C, 0 to 50°C.
Counting Rate The gain shift of a 4-V reference pulse is
<0.25% with the application of an additional count rate of
65,000 counts/sec of 6.0-V random pulses.
furnished through the Enable input connector, which is on
the front panel, or the DC Inhibit Input connector on the
rear panel:
Norm
Input pulse will be gated through to the output
during a gate width interval following the leading edge of
each Enable input pulse.
Pulse Inhibit
Input pulses wil l be inhibited from passing
through the output during a gate width interval following
each Bnable input pulse.
DC Inhibit
Input pulses wi l l be inhibited from passing
through the output during intervals of pulses or dc levels
through the DC Inhibit Input connector on the rear panel.
2.2. CONTROLS
Gate Width Continuously variable from 0.3 to 4 fjsec.
Output Pedestal Adjustable to <1 mV.
Pulse Inhibit/Norm/DC Inhibit 3-position mode switch that
permits selection of the function of any pulse or dc level
2.3. INPUTS
Input
Unipolar or bipolar with positive portion leading.
Rated range 0.2 to 10 V, 12 V maximum. Input impedance
>5000T2. BNC connector on front panel.
Enable (or Inhibit) Any positive input >2 V, maximum in
put 20 V. Enable impedance 1000^2, dc-coupled; Inhibit