AMD Athlon 6 Révision - Page 14

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Preliminary Information

AMD Athlon™ Processor Model 6 Revision Guide

24332E—December 2002

Using Task Gates With Breakpoints Enabled May Cause Unexpected Faults

Products Affected. A0, A2, A5

Normal Specified Operation. Task gates should correctly use the TSS selector out of the task gate for CALL

and JMP instructions.

Non-conformance. When a task gate is used by a CALL or JMP instruction and any debug breakpoint is

enabled through the DR7.LE or GE bits, the processor may, under certain timing scenarios, incorrectly

use the new TSS base[15:0] contained in the new TSS as a selector. This will most likely cause a GP

fault with an error code of the new TSS base.

Potential Effect on System. System failure.

Suggested Workaround. When using software that uses task gates with CALL or JMP instructions, do not

enable breakpoints.

Resolution Status. No fix planned.