DTK PIM-TB10 Manuel de l'utilisateur - Page 8
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line'goes active.
DACKO - 3 - DAM Acknowledge 0 to 3:
I
These lines are DACK3 used to acknowledge DMA requests
(DRQ1-DRQ31 and to refresh·system dynamic memory (DACKO).
"111
They are active low.
I
AEN, Address Enable:
fl
This line is used to degate the processor and other devices
I: I
from the I/O channel to allow DMA transfers to take place.
III
When this line is active (high). the DMA controller has control
the address bus, data bus, read command lines (memory and
.,,1
I/O), and the write command lines (memory and I/O),
TIC,
Terminal Count:
This line provides a pulse when the terminal count for any
DMA channel is reached. This signal is active high.
CARD SlCTD, Card Selected:
II!
This line is activated by cards in expansion slot J8. It signals,
"THE SYSTEM
BOARD", tha't the card has been selected and
that appropriate drivers on the system board should be directed to
I
either read from, or write to, expansion slot J8. Connectors J 1
through J8 are tied together at this pin, but the system board
should be driven by an open collector device.
The following voltages are available on the system board I/O
channel:
10
T:;
Vdc
+ -
5%, located on 2 connector pins
-5 Vdc
+ -
iO%, located on 1 connector pin
+
12 Vdc
+ -
5%, located on 1 connector pin
- 12 Vdc
+
-10%, located on 1 connector pin
GND (Ground).
located on 3 connector pins
1-4 Speaker Interface
The sound system has a small, permanent·magnet, 2% if'ch
speaker. The speaker can be driven from one or two sources:
* An 8255A-5 PPI output bit. The address and bit are defined in
the "I/O Address Map"
,j
*
A timer clock channel, the output of which is pror"< nmable
within the founctions of the 8253-5 timer when l.JsiWl a 1.19
MHz clock input.
The timer gate also is control10d by an
8255A-5 PPI output·port bit. Address and bit assignment are
in the "I/O Address Map".
The speaker connection is a 4-pin berg connector, See "Sys
tem Board Component Diagram", earlier in this seclion, for
speaker connection or placement.
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