DAQ PCI-FRM01 Manuel d'application - Page 5

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3. I/O Address Usage

The below table indicates the base address of the peripheral device that is located I/O area address.
The table below the I / O area is located at the address indicates the base address of the peripheral
device. All I / O registers are 32-bit input / output processing.
I/O Address
Function
Offset Base
00h-5Fh
Reserved
60h
UART
70h-AFh
Reserved
B0h
Interrupt
C0h
Camera Link
D0h
DIO
E0h-FFh
Reserved
Reserved area for future use
Universal asynchronous receiver transmitter (RS232C)
Reserved area for future use
Interrupt controller
Frame grabber LVDS interface
Photo-coupler isolated Digital input/Output
Reserved area for future use
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PCI-FRM01 Register Level Application Guide
Description
(AN241)
Application Note
Comment
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