Acer AR380 F2 Spécifications - Page 7
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Acer AR380 F2 specifications
Technical specifications
®
PCIe
specifications
The primary I/O bus for the main board is PCIe
PCI-E bus segments. Details about each bus segment follow the table.
NOTE: The signaling bit rate of PCI Express is 8.0Gbit/s one direction per lane for Gen 3
Expansion
Number CPU Type
slot
PCIe x16
1
PCIe x8
1
PCIe x16
1
PCIe x8
1
PCIe x8
1
PCIe x8
1
NOTE:
1. Indicates the number of physical electrical lanes running to a PCIe
2. CPU 2 indicates that a second CPU is required to access that specific PCIe
3. Default bus assignment (in decimal). Inserting cards with PCI™ bridges may alter the actual bus
assignment number.
4. Slots are enumerated differently based on the operating system. Microsoft® operating systems
enumerate Device ID by bus starting from the lowest bus to the highest.
Bus
width
2
PCIe
X16
Gen3
1
PCIe
X8
Gen3
1
PCIe
x16
Gen3
1
PCIe
X8
Gen3
2
PCIe
X8
Gen3
2
PCIe
X8
Gen3
®
Gen3. The following table lists the characteristics of the
Voltage
1
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
Connector
Location
X16
Left riser
X8
Left riser
x16
Left riser
X8
Left riser
X8
Right riser
X8
Right riser
®
connector.
®
slot.
Length
Full height
Full length
Full height
Full length
Full height
Full length
Full height
Half length
Low profile
Half length
Low profile
Half length
7