Dynamic Engineering PCIe8LXMCX2 Manuel de l'utilisateur - Page 7
Parcourez en ligne ou téléchargez le pdf Manuel de l'utilisateur pour {nom_de_la_catégorie} Dynamic Engineering PCIe8LXMCX2. Dynamic Engineering PCIe8LXMCX2 17 pages. Pcie 8 lane 2 position xmc compatible carrier, with pmc/scsi rear io connector
Imprimer la pagethe power budget is more than sufficient. If your XMC's require more power please
request one of the optional power connectors [discrete wire, 4 wire standard PC vert or
horizontal] to increase the 12V available. Both 12V entry points are diode coupled to
prevent the current back-feeding when an external or other supply is added.
P3: 1-2 = gnd, 3-4 = 12V. P4,6: 1= 12V, 2-3 = gnd.
J4, J5
control the power sequencing for 3.3V and 5V respectively. 1-2 selects a
delayed start-up of the power supply, 2-3 for immediate start-up [based on 12V
available] and open is off [used for power savings when a supply is not required. Added
with Rev 03 boards. Resistor options are available to hardwire the selection.
DipSwitch Settings
Switch 1: Global Address Settings
Position 1-3 corresponds to XMC0 GA0-2. When closed the signal is '0'. When open
the signal is '1'.
Position 4 corresponds to XMC0-MVR0. When closed the signal is '0'. When open the
signal is '1'.
Position 5-7 corresponds to XMC1 GA0-2. When closed the signal is '0'. When open
the signal is '1'.
Position 8 corresponds to XMC1-MVR0. When closed the signal is '0'. When open the
signal is '1'.
Embedded Solutions
Page 7