DG FPGA Mise en place - Page 14

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DG FPGA Mise en place
dg_toe100gip_fpgasetup_xilinx.doc
3 Test environment setup when using two FPGAs
Before running the test, please prepare following test environment.
• Two FPGA development boards which can be the same board or different board: KCU116
board, Alveo U250 accelerator card, and FB2CGHH@KU15P card
• 100Gb Ethernet cable: 100Gb transceiver (BASE-SR) and fiber cable
a) KCU116 board: Use 4xSFP28 transceiver (25GBASE-SR) with 8xLC Fiber cable
b) U250 card and FB2CGHH@KU15P card: Use QSFP28 transceiver (100GBASE-SR)
with MTP/MPO Fiber cable
• USB cable for connecting between FPGA and PC
a) KCU116: 2 micro USB cables for programming FPGA and Serial console
b) U250 card: 1 micro USB cable for programming FPGA and Serial console
c) FB2CGHH@KU15P card: 1 mini USB cable for programming FPGA and JTAGAURT
• For KCU116 and U250 card, Serial console software such as TeraTerm, installed on PC.
The setting on the console is Baudrate=115,200, Data=8-bit, Non-parity, and Stop=1.
• Vivado tool for programming FPGA, installed on PC
28-Apr-21
Page 14