DG NVMeG4-IP Manuel d'instructions - Page 9
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dg_nvmeg4ip_instruction_xilinx_en.doc
Figure 3-3 Example Test data of the 1
Test data in SSD is split into 512-byte unit. For incremental, decremental, or LFSR pettern,
each 512-byte data has unique 64-bit header which consists of 48-bit address (in 512-byte
unit) and 16-bit zero value. The data after 64-bit header is the test pattern which is selected
by user.
The left window of Figure 3-3 shows the example when using 32-bit incremental pattern
while the right window shows the example when using 32-bit LFSR pattern.
20-Apr-20
st
nd
and 2
512 byte by using increment/LFSR pattern
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