HP 124708-001 - ProLiant Cluster - 1850 Vue d'ensemble - Page 11

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Advanced memory technologies

Despite the performance improvement in the overall system due to use of SDRAM, the growing

performance gap between the memory and processor must be filled by more advanced memory

technologies. These technologies, which are described on the following pages, boost the overall

performance of systems using the latest high-speed processors (Figure 9).

Figure 9. Peak bandwidth comparison of SDRAM and advanced SDRAM technologies

Double Data Rate (DDR) SDRAM is advantageous for systems that require higher bandwidth than can

be obtained using SDRAM. Basically, DDR SDRAM doubles the transfer rate without increasing the

frequency of the memory clock. This section describes three generations of DDR SDRAM technology.

DDR-1

To develop the first generation of DDR SDRAM (DDR-1), designers made enhancements to the SDRAM

core to increase the data rate. These enhancements include prefetching, double transition clocking,

strobe-based data bus, and SSTL_2 low voltage signaling. At 400 MHz, DDR increases memory

bandwidth to 3.2 GB/s, which is 400 percent more than original SDRAM.

Prefetching

In SDRAM, one bit per clock cycle is transferred from the memory cell array to the input/output (I/O)

buffer or data queue (DQ). The I/O buffer releases one bit to the bus per pin and clock cycle (on the

rising edge of the clock signal). To double the data rate, DDR SDRAM uses a technique called

prefetching to transfer two bits from the memory cell array to the I/O buffer in two separate pipelines.

Then the I/O buffer releases the bits in the order of the queue on the same output line. This is known

as a 2n-prefetch architecture because the two data bits are fetched from the memory cell array before

they are released to the bus in a time multiplexed manner.