Digilent Atlys Manuel de référence - Page 2

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Atlys Reference Manual
Configuration
After power-on, the
FPGA on the Atlys
board must be
configured (or
programmed) before it
can perform any
functions. The FPGA
can be configured in
one of three ways: a
USB-connected PC can
configure the board
using the JTAG port any
time power is on, a
configuration file stored
in the SPI Flash ROM
can be automatically
transferred to the FPGA
at power-on, or a
programming file can be transferred from a USB memory stick
attached to the USB HID port.
An on-board "mode" jumper (JP11) selects between JTAG/USB
and ROM programming modes. If JP11 is not loaded, the FPGA will
automatically configure itself from the ROM. If JP11 is loaded, the
FPGA will remain idle after power-on until configured from the
JTAG or Serial programming port.
Both Digilent and Xilinx freely distribute software that can be used
to program the FPGA and the SPI ROM. Programming files are
stored within the FPGA in SRAM-based memory cells. This data
defines the FPGA's logic functions and circuit connections, and it
remains valid until it is erased by removing power or asserting the
PROG_B input, or until it is overwritten by a new configuration file.
FPGA configuration files transferred via the JTAG port use the .bin
or .svf file types, files transferred from a USB stick use the .bit file
type, and SPI programming files can use .bit, .bin, or .mcs types.
The ISE/WebPack or EDK software from Xilinx can create bit, svf,
bin, or mcs files from VHDL, Verilog, or schematic-based source
files (EDK is used for MicroBlaze™ embedded processor-based
designs). Digilent's Adept software or Xilinx's iMPACT software can
be used to program the FPGA or ROM using the Adept USB port.
During FPGA programming, a .bit or .svf file is transferred from the
PC directly to the FPGA using the USB-JTAG port. When
programming the ROM, a .bit, .bin, or .mcs file is transferred to the ROM in a two-step process. First,
the FPGA is programmed with a circuit that can program the SPI ROM, and then data is transferred to
the ROM via the FPGA circuit (this complexity is hidden from the user – a simple "program ROM"
interface is presented by the programming software). After the ROM has been programmed, it can
automatically configure the FPGA at a subsequent power-on or reset event if the JP11 jumper is
Doc: 502-178
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