Toshiba TLP510E Manuel de formation technique - Page 34

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TDA9141 has two input terminals for the composite
video/Y signal (pin 25) and C signal (pin 26), and each
of the signals is automatically identified through I
BUS control.
V
P2
1
N.C.
2
GND2
3
I.C.
4
TDA4665
5
SAND
N.C.
6
I.C.
7
I.C.
8
Fig. 7-3-6 Pin configuration of TDA4665T
SIGNAL
±
(R-Y)
16
CLAMPING
Color difference
input signals
SIGNAL
±
(B-Y)
14
CLAMPING
V P1
analog supply
9
SANDCASTLE
5
DETECTOR
Sand castle
pulse input
10
GND 1
7-3-3. Luminance (Y) Signal Process Circuit
The processing method differs as follows depending on
type of the signal entered.
(a)
For a SECAM input, it passes through a burst signal
trap circuit.
2
C-
MED849
V
16
i(R-Y)
15
N.C.
V
14
i(B-Y)
13
N.C.
V
12
o(B-Y)
V
11
o(R-Y)
10
GND1
V
9
P1
LINE
MEMORY
Pre-amplifiers
LINE
MEMORY
FREQUENCY
DIVIDER
PHASE
BY 192
DETECTOR
LP
Digital supply
Fig. 7-3-7 Block diagram of TDA4665T
Table 7-3-2 Terminal function of TDA4665T
Pin No.
Name
1
V
P2
2
N.C.
3
GND2
4
I.C.
5
SAND
6
N.C.
7
I.C.
8
I.C.
9
VP1
10
GND1
11
V
o(R-Y)
12
V
o(B-Y)
13
N.C.
14
V
i(B-Y)
15
N.C.
16
V
i(R-Y)
SAMPLE
LP
AND
HOLD
SAMPLE
LP
AND
HOLD
TDA4665
3 MHz shifting clock
6 MHz
DIVIDER
CCO
BY 2
1
V P2
(b)
For a NTSC/PAL (with burst signal) input (Y/C-sepa-
rated signals), the burst signal trap circuit is bypassed.
It passes through a delay circuit for a phase match-
ing to the color signal.
(c)
For a NTSC/PAL (without burst signal) input, above
trap circuit and the delay circuit are bypassed to per-
form a stable color killer operation.
7-7
Function
+5V power supply for
digital block
Not used
GND (0V) for digital block
Internal connection
Sandcastle pulse input
Not used
Internal connection
Internal connection
+5V power supply for
analog block
GND (0V) for analog
block
± (R–Y) output signal
± (B–Y) output signal
Not used
± (B–Y) input signal
Not used
± (R–Y) input signal
±
11
Addition
Output
Color difference
stages
buffers
Output signals
±
12
N.C.
2
N.C.
6
N.C.
13
N.C.
15
I.C.
7
3
4
8
GND 2
MED848
(R-Y)
(B-Y)