Pioneer DV-505 Manuel d'entretien - Page 7
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Également pour Pioneer DV-505 : Manuel d'instruction et d'installation (16 pages)
1.2.3 Tracking / Slider Servo
ATB: The tracking balance compensation is
achieved by outputting the offset from
the TBAL output at pin 46 of the digital
servo IC, and by biasing the charge pump
resistor for phase-difference error of
RFIC.
The difference is detected by processing
TE at pin 34 of IC 201 with an internal
digital equalizer.
TDO: In addition to the servo output, the low-
band components, such as the kick-brake
for jump, are added for TDO output.
SLDO: The low-band components of TE are
processed by the internal digital
equalizer, and deadband is added for
SLDO output. The offset voltage for
pickup movement is also included in the
SLDO output.
1.2.4 SPINDLE SERVO
• SPDL SERVO
RF
OEIC
FG
SPDL +
12
IC161
SPDL
DRV
M
13
SPDL -
(Base)
For a CD, the RF signal output from pin 32 of the RF IC is converted
to binary in IC201. By comparing the binary value with the reference
CLK (clock), the SPDL ERR signal is output from pin 48.
For a DVD, the SPDL ERR signal is generated from the PWM signal
output from LSI- . Upon receiving this signal via pin 31, IC201
also outputs it from pin 48, switching from the CD SPDL ERR
signal.
• TRACKING / SLIDER SERVO
PICKUP
TE RF
B1
B2
OEIC
B3
B4
TRKG
COIL
RFO
IC101
3
50
RFIC
CLK
(27M)
32
12
RF
41
VCO
IC201
DIGITAL
SERVO
31
57
48
SPDO
SPDO
25
(Compatible)
TE
4
26
5
IC101
RFIC
6
TBAL
7
28
8
CP
TDO
26
24
27
IC151
DRIVER
SLDO
19
16
17
M
SLDR
ATC
3
200
IC301
|
|
8 bit
A/D
10
207
176
APC
178
AFC
180
IC302
ASC
(1/2)
177
161 163 166 167
FPWM
VPWM
PPWM
RPWM
IC271
(2/2)
V165
IC271
(1/2)
DV-505, DVL-909, DV-S9
34
IC201
ADDRESS
DIGITAL
&
SERVO IC
BUS
46
50
47
179
IC701
LSI II
159
95
DUTY50
FG
IC501
MECH.
CONTROL
7