Cypress CY62167DV18 Fiche technique - Page 7
Parcourez en ligne ou téléchargez le pdf Fiche technique pour {nom_de_la_catégorie} Cypress CY62167DV18. Cypress CY62167DV18 12 pages. Mobl 16-mbit (1m x 16) static ram
Imprimer la pageSwitching Waveforms
Write Cycle 1 (WE Controlled)
ADDRESS
CE
1
CE
2
WE
BHE/BLE
OE
DATA IO
NOTE 19
Write Cycle 2 (CE
or CE
Controlled)
1
2
ADDRESS
CE
1
CE
2
WE
BHE/BLE
OE
DATA IO
NOTE 19
Notes
17. Data IO is high impedance if OE = V
18. If CE
goes HIGH and CE
goes LOW simultaneously with WE = V
1
2
19. During this period, the IOs are in output state. Do not apply input signals.
Document #: 38-05326 Rev. *C
(continued)
[13, 17, 18]
t
SCE
t
AW
t
SA
t
HZOE
[13, 17, 18]
t
SA
t
AW
t
HZOE
.
IH
, the output remains in a high impedance state.
IH
CY62167DV18 MoBL
t
WC
t
PWE
t
BW
t
SD
VALID DATA
t
WC
t
SCE
t
PWE
t
BW
t
SD
VALID DATA
t
HA
t
HD
t
HA
t
HD
Page 7 of 11
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