Cypress Semiconductor CY25566 Fiche technique - Page 6
Parcourez en ligne ou téléchargez le pdf Fiche technique pour {nom_de_la_catégorie} Cypress Semiconductor CY25566. Cypress Semiconductor CY25566 9 pages. Cypress spread spectrum clock generator specification sheet
Imprimer la pageApplication Schematic
In this example, the CY25566 is being driven by a 75-MHz
reference clock.
S0 = 0 and S1 = 0 are programmed to select a BW of 2.5%.
(Refer to Table 1 and 2.)
S2 = 0 and S3 = 1 are programmed to select the Group 2
range.
Document #: 38-07429 Rev. *B
VDD
0.1 uF
75 MHz Clock source
1
XIN/CLKIN
16
XOUT
2
REFOFF
VDD
10
SSCC
7
S3
6
S2
12
S1
13
S0
VSS
5
Figure 4. Application Schematic
V
= 3.30 VDC.
DD
SSCLK1a = 75 MHz @ 2.5% center spread modulation.
SSCLK1b = 75 MHz @ 2.5% center spread modulation.
SSCLK 2 = 37.5 MHz @ 2.5% center spread modulation.
REFOUT = 37.5 MHz non-modulated clock.
4
VDD
3
REFOUT
REFOUT
15
SSCLK2
SSCLK2
CY25566
8
SSCLK1a
SSCLK1a
9
SSCLK1b
SSCLK1b
VSS
VSS
11
14
CY25566
Page 6 of 9
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