Cypress Semiconductor CY7C0241AV Fiche technique - Page 11

Parcourez en ligne ou téléchargez le pdf Fiche technique pour {nom_de_la_catégorie} Cypress Semiconductor CY7C0241AV. Cypress Semiconductor CY7C0241AV 20 pages. 3.3v 4k/8k/16k x 16/18 dual-port static ram

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Switching Waveforms

Figure 5. Read Cycle No. 1 (Either Port Address Access)
ADDRESS
DATA OUT
PREVIOUS DATA VALID
Figure 6. Read Cycle No. 2 (Either Port CE/OE Access)
CE and
LB or UB
OE
DATA OUT
I
CC
CURRENT
I
SB
ADDRESS
UB or LB
CE
DATA OUT
Notes
29. R/W is HIGH for read cycles.
30. Device is continuously selected CE = V
31. OE = V
.
IL
32. Address valid prior to or coincident with CE transition LOW.
33. To access RAM, CE = V
, UB or LB = V
IL
Document #: 38-06052 Rev. *J
t
RC
t
AA
t
OHA
t
ACE
t
t
LZOE
t
LZCE
t
PU
Figure 7. Read Cycle No. 3 (Either Port)
t
RC
t
AA
t
LZCE
t
ABE
t
ACE
t
LZCE
and UB or LB = V
. This waveform cannot be used for semaphore reads.
IL
IL
, SEM = V
. To access semaphore, CE = V
IL
IH
CY7C024AV/024BV/025AV/026AV
CY7C0241AV/0251AV/036AV
DATA VALID
[29, 32, 33]
DOE
[29, 31, 32, 33]
, SEM = V
.
IH
IL
[29, 30, 31]
t
OHA
t
HZCE
t
HZOE
DATA VALID
t
PD
t
OHA
t
HZCE
t
HZCE
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