Cypress Semiconductor CY7C037V Fiche technique - Page 9

Parcourez en ligne ou téléchargez le pdf Fiche technique pour {nom_de_la_catégorie} Cypress Semiconductor CY7C037V. Cypress Semiconductor CY7C037V 19 pages. 3.3v 32k/64k x 16/18 dual-port static ram

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Cypress Semiconductor CY7C037V Fiche technique

Switching Waveforms

Figure 4. Read Cycle No. 1 (Either Port Address Access)
ADDRESS
DATA OUT
PREVIOUS DATA VALID
CE and
LB or UB
OE
DATA OUT
I
CC
CURRENT
I
SB
ADDRESS
UB or LB
CE
DATA OUT
Notes
15. R/W is HIGH for read cycles.
16. Device is continuously selected CE = V
17. OE = V
.
IL
18. Address valid prior to or coincident with CE transition LOW.
19. To access RAM, CE = V
, UB or LB = V
IL
Document #: 38-06078 Rev. *B
t
RC
t
AA
t
OHA
Figure 5. Read Cycle No. 2 (Either Port CE/OE Access)
t
ACE
t
LZOE
t
LZCE
t
PU
Figure 6. Read Cycle No. 3 (Either Port)
t
RC
t
AA
t
LZCE
t
ABE
t
ACE
t
LZCE
and UB or LB = V
. This waveform cannot be used for semaphore reads.
IL
IL
, SEM = V
. To access semaphore, CE = V
IL
IH
CY7C027V/027VN/027AV/028V
DATA VALID
t
DOE
[15, 17, 18, 19]
, SEM = V
.
IH
IL
CY7C037V/037AV/038V
[15, 16, 17]
t
OHA
[15, 18, 19]
t
HZCE
t
HZOE
DATA VALID
t
PD
t
OHA
t
HZCE
t
HZCE
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